[PATCH 01/17] arm: mach-k3: Add basic support for AM642 SoC definition

Dave Gerlach d-gerlach at ti.com
Fri Apr 23 18:27:32 CEST 2021

The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.

Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
  MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
  controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
* Centralized System Controller for Security, Power, and Resource
  Management (DMSC).

See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2

Signed-off-by: Dave Gerlach <d-gerlach at ti.com>
 arch/arm/mach-k3/Kconfig      | 14 ++++++++++----
 arch/arm/mach-k3/Makefile     |  1 +
 arch/arm/mach-k3/am642_init.c | 28 ++++++++++++++++++++++++++++
 3 files changed, 39 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/mach-k3/am642_init.c

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index c7d186149ba5..35edc6d8eeb8 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -10,6 +10,9 @@ config SOC_K3_AM6
 config SOC_K3_J721E
 	bool "TI's K3 based J721E SoC Family Support"
+config SOC_K3_AM642
+	bool "TI's K3 based AM642 SoC Family Support"
 config SYS_SOC
@@ -19,16 +22,18 @@ config SYS_K3_NON_SECURE_MSRAM_SIZE
 	default 0x80000 if SOC_K3_AM6
 	default 0x100000 if SOC_K3_J721E
+	default 0x1c0000 if SOC_K3_AM642
-	  Describes the total size of the MCU MSRAM. This doesn't
-	  specify the total size of SPL as ROM can use some part
-	  of this RAM. Once ROM gives control to SPL then this
-	  complete size can be usable.
+	  Describes the total size of the MCU or OCMC MSRAM present on
+	  the SoC in use. This doesn't specify the total size of SPL as
+	  ROM can use some part of this RAM. Once ROM gives control to
+	  SPL then this complete size can be usable.
 	default 0x58000 if SOC_K3_AM6
 	default 0xc0000 if SOC_K3_J721E
+	default 0x180000 if SOC_K3_AM642
 	  Describes the maximum size of the image that ROM can download
 	  from any boot media.
@@ -51,6 +56,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
 	default 0x41c7fbfc if SOC_K3_AM6
 	default 0x41cffbfc if SOC_K3_J721E
+	default 0x701bebfc if SOC_K3_AM642
 	  Address at which ROM stores the value which determines if SPL
 	  is booted up by primary boot media or secondary boot media.
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 7572f56925cd..890d1498d0c8 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -5,6 +5,7 @@
 obj-$(CONFIG_SOC_K3_AM6) += am6_init.o
 obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o
+obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
 obj-$(CONFIG_ARM64) += arm64-mmu.o
 obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
 obj-$(CONFIG_TI_SECURE_DEVICE) += security.o
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
new file mode 100644
index 000000000000..e73450da41da
--- /dev/null
+++ b/arch/arm/mach-k3/am642_init.c
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+ * AM642: SoC specific initialization
+ *
+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
+ *	Keerthy <j-keerthy at ti.com>
+ *	Dave Gerlach <d-gerlach at ti.com>
+ */
+#include <common.h>
+#include <spl.h>
+#include <asm/io.h>
+#include "common.h"
+#if defined(CONFIG_SPL_BUILD)
+void board_init_f(ulong dummy)
+#if defined(CONFIG_CPU_V7R)
+	setup_k3_mpu_regions();
+	/* Init DM early */
+	spl_early_init();
+	preloader_console_init();

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