Question/issues about i.MX6 DDR configuration

[Francesco Dolcini]

On Thu, Dec 02, 2021 at 05:56:38PM -0300, Fabio Estevam wrote:
> The part that Francesco quoted:
> 
> "A Precharge All command must be issued prior to the
> MRW command to ensure robust DDR initialization. This
> command is required to be issued to both chip selects if two
> chip selects are utilized in the system."
> 
> Does not apply to mx6sabresd as it only has one chip select.

I think that this applies even with just one chip select, it is just
prescribing a procedure and explicitly saying that it must be done for
all the chip select in use, either 1 or 2.

Not sure if this is the reason for the sporadic failures I'm
debugging, what triggered my attention was that this is supposed to be
needed for a more "robust" initialization, whatever that means ...

Francesco