[PATCH 1/1] mtd: spi-nor-ids: Add support of flash protection to w25q128

Jagan Teki jagan at amarulasolutions.com
Fri Feb 26 09:06:39 CET 2021


On Mon, Jan 25, 2021 at 8:29 AM Su Baocheng <baocheng_su at 163.com> wrote:
>
> From: Su Baocheng <baocheng.su at siemens.com>
>
> The NOR flash w25q128 denoted by JEDEC ID 0xef4018 actually represents
> various models. From Winbond's website, I could only find 3 types of
> them:
>
>     W25Q128JV-IQ/JQ
>     datasheet:https://www.winbond.com/resource-files/
> w25q128jv%20revg%2004082019%20plus.pdf
>
>     W25Q128FV (SPI Mode)
>     datasheet: https://www.winbond.com/resource-files/
> w25q128fv%20rev.m%2005132016%20kms.pdf
>
>     W25Q128BV
>     datesheet: https://www.winbond.com/resource-files/
> w25q128bv_revh_100313_wo_automotive.pdf
>
> According to the datasheets, all of these 3 types support BP(0,1,2) and
> TB bits in the status register (SR), so it could reuse the flash
> protection logic for ST Micro.
>
> So it should be safe to add the SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB
> flags to the w25q128 entry of spi_nor_ids table.
>
> Signed-off-by: Su Baocheng <baocheng.su at siemens.com>
> ---
>
>  drivers/mtd/spi/spi-nor-ids.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 5bd5dd3003..dcce25bec2 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -319,7 +319,17 @@ const struct flash_info spi_nor_ids[] = {
>         { INFO("w25q80bl", 0xef4014, 0, 64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>         { INFO("w25q16cl", 0xef4015, 0, 64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>         { INFO("w25q64cv", 0xef4017, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> -       { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> +       /* There are 3 types of w25q128 with JEDEC ID 0xef4018:
> +        *     W25Q128JV-IQ/JQ
> +        *     W25Q128FV (SPI Mode)
> +        *     W25Q128BV
> +        *  According to the datasheets, All of these 3 types support
> +        *  protection through BP{0,1,2}, TB in the status register (SR).
> +        */

Dropped comments, as it clearly mentioned on commit log.

> +       { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256,
> +                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> +       },

Applied to u-boot-spi/master


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