[PATCH v2 3/4] board: freescale: t208xrdb: add Linux fdt fix-ups for rev D

[Camelia Groza]

From: Camelia Groza <camelia.groza at nxp.com>

The T2080RDB boards revisions D and up have updated 10G Aquantia PHYs
connected to MAC1 and MAC2. The second Aquantia PHY is located at a
different address on the MDIO bus compared to rev C (0x8 instead of 0x1).

Fix-up the Linux device tree to update the PHY address for the second
Aquantia PHY on boards revisions D and up. Also rename the PHY node to
reflect the changes.

Signed-off-by: Camelia Groza <camelia.groza at nxp.com>
---
Changes in v2:
- patch title and description rewording
- define the AQR113C_PHY_ADDR in this patch since the patch in which it
  was defined previously was dropped.

 board/freescale/t208xrdb/eth_t208xrdb.c | 35 +++++++++++++++++++++++++
 board/freescale/t208xrdb/t208xrdb.c     |  1 +
 board/freescale/t208xrdb/t208xrdb.h     |  1 +
 include/configs/T208xRDB.h              |  8 ++++--
 4 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c
index 4b44b1617d6c..e4592eac1530 100644
--- a/board/freescale/t208xrdb/eth_t208xrdb.c
+++ b/board/freescale/t208xrdb/eth_t208xrdb.c
@@ -26,6 +26,8 @@
 #include <fsl_dtsec.h>
 #include <asm/fsl_serdes.h>

+extern u8 get_hw_revision(void);
+
 /* Disable the MAC5 and MAC6 "fsl,fman-memac" nodes and the two
  * "fsl,dpa-ethernet" nodes that reference them.
  */
@@ -60,6 +62,39 @@ void fdt_fixup_board_fman_ethernet(void *fdt)
 	}
 }

+/* Update the address of the second Aquantia PHY on boards revision D and up.
+ * Also rename the PHY node to align with the address change.
+ */
+void fdt_fixup_board_phy(void *fdt)
+{
+	const char phy_path[] =
+		"/soc at ffe000000/fman at 400000/mdio at fd000/ethernet-phy at 1";
+	int ret, offset, new_addr = AQR113C_PHY_ADDR2;
+	char new_name[] = "ethernet-phy at 00";
+
+	if (get_hw_revision() == 'C')
+		return;
+
+	offset = fdt_path_offset(fdt, phy_path);
+	if (offset < 0) {
+		printf("ethernet-phy at 1 node not found in the dts\n");
+		return;
+	}
+
+	ret = fdt_setprop(fdt, offset, "reg", &new_addr, sizeof(new_addr));
+	if (ret < 0) {
+		printf("Unable to set 'reg' for node ethernet-phy at 1: %s\n",
+		       fdt_strerror(ret));
+		return;
+	}
+
+	sprintf(new_name, "ethernet-phy@%x", new_addr);
+	ret = fdt_set_name(fdt, offset, new_name);
+	if (ret < 0)
+		printf("Unable to rename node ethernet-phy at 1: %s\n",
+		       fdt_strerror(ret));
+}
+
 void fdt_fixup_board_enet(void *fdt)
 {
 	return;
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index f7fa65d1a166..1f0cdee0b863 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -153,6 +153,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 #ifdef CONFIG_SYS_DPAA_FMAN
 	fdt_fixup_board_fman_ethernet(blob);
 	fdt_fixup_board_enet(blob);
+	fdt_fixup_board_phy(blob);
 #endif

 	return 0;
diff --git a/board/freescale/t208xrdb/t208xrdb.h b/board/freescale/t208xrdb/t208xrdb.h
index cd0a9f44da79..edbc860c9d02 100644
--- a/board/freescale/t208xrdb/t208xrdb.h
+++ b/board/freescale/t208xrdb/t208xrdb.h
@@ -10,5 +10,6 @@
 void fdt_fixup_board_enet(void *blob);
 void pci_of_setup(void *blob, struct bd_info *bd);
 void fdt_fixup_board_fman_ethernet(void *blob);
+void fdt_fixup_board_phy(void *blob);

 #endif
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e467ef453d2f..0c657d76818b 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */

 /*
@@ -537,8 +537,12 @@ unsigned long get_board_ddr_clk(void);
 #define RGMII_PHY2_ADDR		0x02
 #define CORTINA_PHY_ADDR1	0x0c  /* Cortina CS4315 */
 #define CORTINA_PHY_ADDR2	0x0d
-#define FM1_10GEC3_PHY_ADDR	0x00  /* Aquantia AQ1202 10G Base-T */
+/* Aquantia AQ1202 10G Base-T used by board revisions up to C */
+#define FM1_10GEC3_PHY_ADDR	0x00
 #define FM1_10GEC4_PHY_ADDR	0x01
+/* Aquantia AQR113C 10G Base-T used by board revisions D and up */
+#define AQR113C_PHY_ADDR1	0x00
+#define AQR113C_PHY_ADDR2	0x08
 #endif

 #ifdef CONFIG_FMAN_ENET
--
2.17.1