[PATCH] configs: imx8mn_beacon_fspi: Add config for booting from QSPI

[Adam Ford]

On Sun, Jul 31, 2022 at 8:24 PM Adam Ford <aford173 at gmail.com> wrote:
>
> The imx8mn-beacon SOM has a QSPI part on it connected to the
> FlexSPI controller.  Add a defconfig option which supports
> booting from the QSPI NOR flash instead of sd/mmc.
>
> Signed-off-by: Adam Ford <aford173 at gmail.com>
> ---
>
> This won't fully function without this series:
> https://patchwork.ozlabs.org/project/uboot/list/?series=312016

Stefano,

The link above has been replaced with V2 [1]
I confirmed that this applies to u-boot-imx cleanly after  V2.

adam

[1] - https://patchwork.ozlabs.org/project/uboot/list/?series=324057
>
> diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig
> new file mode 100644
> index 0000000000..ecaefd8930
> --- /dev/null
> +++ b/configs/imx8mn_beacon_fspi_defconfig
> @@ -0,0 +1,156 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_IMX8M=y
> +CONFIG_SYS_TEXT_BASE=0x40200000
> +CONFIG_SYS_MALLOC_LEN=0x2000000
> +CONFIG_SPL_GPIO=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_ENV_SIZE=0x2000
> +CONFIG_ENV_OFFSET=0xFFFFDE00
> +CONFIG_DM_GPIO=y
> +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
> +CONFIG_SPL_TEXT_BASE=0x912000
> +CONFIG_TARGET_IMX8MN_BEACON=y
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_DRIVERS_MISC=y
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
> +CONFIG_SPL=y
> +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
> +CONFIG_SYS_LOAD_ADDR=0x40480000
> +CONFIG_SYS_MEMTEST_START=0x40000000
> +CONFIG_SYS_MEMTEST_END=0x44000000
> +CONFIG_LTO=y
> +CONFIG_REMAKE_ELF=y
> +CONFIG_FIT=y
> +CONFIG_FIT_EXTERNAL_OFFSET=0x3000
> +CONFIG_SPL_LOAD_FIT=y
> +# CONFIG_USE_SPL_FIT_GENERATOR is not set
> +CONFIG_OF_SYSTEM_SETUP=y
> +CONFIG_USE_BOOTCOMMAND=y
> +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
> +CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
> +CONFIG_ARCH_MISC_INIT=y
> +CONFIG_SPL_MAX_SIZE=0x25000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x95e000
> +CONFIG_SPL_BSS_MAX_SIZE=0x2000
> +CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_BOOTROM_SUPPORT=y
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK=0x187ff0
> +CONFIG_SYS_SPL_MALLOC=y
> +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
> +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000
> +CONFIG_SYS_SPL_MALLOC_SIZE=0x80000
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
> +CONFIG_SPL_I2C=y
> +CONFIG_SPL_POWER=y
> +CONFIG_SPL_WATCHDOG=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_SYS_PROMPT="u-boot=> "
> +CONFIG_SYS_MAXARGS=64
> +CONFIG_SYS_CBSIZE=2048
> +CONFIG_SYS_PBSIZE=2074
> +# CONFIG_BOOTM_NETBSD is not set
> +CONFIG_SYS_BOOTM_LEN=0x800000
> +# CONFIG_CMD_EXPORTENV is not set
> +# CONFIG_CMD_IMPORTENV is not set
> +CONFIG_CMD_ERASEENV=y
> +# CONFIG_CMD_CRC32 is not set
> +CONFIG_CMD_MEMTEST=y
> +CONFIG_CMD_CLK=y
> +CONFIG_CMD_FUSE=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_MII=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_REGULATOR=y
> +CONFIG_CMD_EXT2=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_CMD_FAT=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_ENV_OVERWRITE=y
> +CONFIG_ENV_IS_NOWHERE=y
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_SYS_MMC_ENV_DEV=2
> +CONFIG_SYS_MMC_ENV_PART=2
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_USE_ETHPRIME=y
> +CONFIG_ETHPRIME="FEC"
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_DM=y
> +CONFIG_REGMAP=y
> +CONFIG_SYSCON=y
> +CONFIG_SPL_CLK_IMX8MN=y
> +CONFIG_CLK_IMX8MN=y
> +CONFIG_USB_FUNCTION_FASTBOOT=y
> +CONFIG_FASTBOOT_BUF_ADDR=0x42800000
> +CONFIG_FASTBOOT_BUF_SIZE=0x40000000
> +CONFIG_FASTBOOT_FLASH=y
> +CONFIG_FASTBOOT_FLASH_MMC_DEV=0
> +CONFIG_MXC_GPIO=y
> +CONFIG_DM_PCA953X=y
> +CONFIG_DM_I2C=y
> +CONFIG_SUPPORT_EMMC_BOOT=y
> +CONFIG_MMC_IO_VOLTAGE=y
> +CONFIG_MMC_UHS_SUPPORT=y
> +CONFIG_MMC_HS400_ES_SUPPORT=y
> +CONFIG_MMC_HS400_SUPPORT=y
> +CONFIG_FSL_USDHC=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SF_DEFAULT_SPEED=40000000
> +CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_MTD=y
> +CONFIG_PHYLIB=y
> +CONFIG_PHY_ATHEROS=y
> +CONFIG_DM_ETH=y
> +CONFIG_PHY_GIGE=y
> +CONFIG_FEC_MXC=y
> +CONFIG_MII=y
> +CONFIG_PINCTRL=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_PINCTRL_IMX8M=y
> +CONFIG_DM_PMIC=y
> +# CONFIG_SPL_PMIC_CHILDREN is not set
> +CONFIG_DM_PMIC_BD71837=y
> +CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_BD71837=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_DM_RESET=y
> +CONFIG_DM_SERIAL=y
> +CONFIG_MXC_UART=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_NXP_FSPI=y
> +CONFIG_SYSRESET=y
> +CONFIG_SPL_SYSRESET=y
> +CONFIG_SYSRESET_PSCI=y
> +CONFIG_SYSRESET_WATCHDOG=y
> +CONFIG_DM_THERMAL=y
> +CONFIG_USB=y
> +# CONFIG_SPL_DM_USB is not set
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="FSL"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0525
> +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
> +CONFIG_CI_UDC=y
> +CONFIG_SDP_LOADADDR=0x0
> +CONFIG_IMX_WATCHDOG=y
> +CONFIG_OF_LIBFDT_OVERLAY=y
> +CONFIG_FSPI_CONF_HEADER=y
> +CONFIG_FSPI_CONF_FILE="fspi_header.bin"
> --
> 2.34.1
>