[PATCH 01/17] arm: xilinx: Setting default i2c clock frequency to 400kHz

Michal Simek michal.simek at amd.com
Mon Jul 10 14:37:27 CEST 2023


From: Varalaxmi Bingi <varalaxmi.bingi at amd.com>

Setting default i2c clock frequency for Zynq and ZynqMP to maximum rate of
400kHz. Current default value is 100kHz.

Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi at amd.com>
Signed-off-by: Michal Simek <michal.simek at amd.com>
---

 arch/arm/dts/zynq-7000.dtsi | 2 ++
 arch/arm/dts/zynqmp.dtsi    | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 97a9e49a19c3..8c6eafec1d4e 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -153,6 +153,7 @@
 			clocks = <&clkc 38>;
 			interrupt-parent = <&intc>;
 			interrupts = <0 25 4>;
+			clock-frequency = <400000>;
 			reg = <0xe0004000 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -164,6 +165,7 @@
 			clocks = <&clkc 39>;
 			interrupt-parent = <&intc>;
 			interrupts = <0 48 4>;
+			clock-frequency = <400000>;
 			reg = <0xe0005000 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index c9640c44451f..5f1e163e87f2 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -611,6 +611,7 @@
 			status = "disabled";
 			interrupt-parent = <&gic>;
 			interrupts = <0 17 4>;
+			clock-frequency = <400000>;
 			reg = <0x0 0xff020000 0x0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -622,6 +623,7 @@
 			status = "disabled";
 			interrupt-parent = <&gic>;
 			interrupts = <0 18 4>;
+			clock-frequency = <400000>;
 			reg = <0x0 0xff030000 0x0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.36.1



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