[PATCH 3/4] rockchip: rk356x-u-boot: Add bootph-all to common pinctrl nodes
Kever Yang
kever.yang at rock-chips.com
Fri Jul 28 12:37:50 CEST 2023
Hi Jonas,
On 2023/7/26 17:08, Jonas Karlman wrote:
> Hi Kever,
>
> On 2023-07-26 10:30, Kever Yang wrote:
>> On 2023/7/3 01:34, Jonas Karlman wrote:
>>> Add bootph-all prop to common pinctrl nodes for eMMC, FSPI, SD-card and
>>> UART2 that are typically used by multiple boards. Unreferenced nodes are
>>> removed from the SPL device tree during a normal build.
>>>
>>> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
>> Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
>>
>> Thanks,
>> - Kever
>>> ---
>>> arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 56 -----------------
>>> arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 54 -----------------
>>> arch/arm/dts/rk356x-u-boot.dtsi | 64 ++++++++++++++++++++
>>> 3 files changed, 64 insertions(+), 110 deletions(-)
>>>
> [...]
>
>>> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
>>> index 0ba38851c25e..45e9390f202d 100644
>>> --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
>>> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
>>> @@ -16,26 +16,6 @@
>>> };
>>> };
>>>
>>> -&emmc_bus8 {
>>> - bootph-all;
>>> -};
>>> -
>>> -&emmc_clk {
>>> - bootph-all;
>>> -};
>>> -
>>> -&emmc_cmd {
>>> - bootph-all;
>>> -};
>>> -
>>> -&emmc_datastrobe {
>>> - bootph-all;
>>> -};
>>> -
>>> -&fspi_pins {
>>> - bootph-all;
>>> -};
>>> -
>>> &pcie2x1 {
>>> pinctrl-0 = <&pcie20m1_pins &pcie_reset_h>;
>>> /* Shared vpcie3v3-supply may cause a sys freeze, disable for now */
>>> @@ -47,8 +27,6 @@
>>> };
> It looks like this patch depends on an earlier version of the "rockchip:
> Fix PCIe and NVMe support on RK3568" series and no longer apply clean.
>
> Should I send a v2 of this series rebased on top of pcie v4 series?
Yes, this patch can not be applied, pls send a new version base on
rockchip-custodian branch.
Thanks,
- Kever
>
> Regards,
> Jonas
>
>>>
>>> &pinctrl {
>>> - bootph-all;
>>> -
>>> pcie {
>>> pcie3x2_reset_h: pcie3x2-reset-h {
>>> rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
>>> @@ -56,34 +34,6 @@
>>> };
>>> };
>>>
>
> [...]
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