[PATCH 3/4] rockchip: rk356x-u-boot: Add bootph-all to common pinctrl nodes

Kever Yang kever.yang at rock-chips.com
Wed Jul 26 10:30:23 CEST 2023


On 2023/7/3 01:34, Jonas Karlman wrote:
> Add bootph-all prop to common pinctrl nodes for eMMC, FSPI, SD-card and
> UART2 that are typically used by multiple boards. Unreferenced nodes are
> removed from the SPL device tree during a normal build.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 56 -----------------
>   arch/arm/dts/rk3568-rock-3a-u-boot.dtsi      | 54 -----------------
>   arch/arm/dts/rk356x-u-boot.dtsi              | 64 ++++++++++++++++++++
>   3 files changed, 64 insertions(+), 110 deletions(-)
>
> diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
> index 57b77151c57c..c925439f71cd 100644
> --- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
> +++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
> @@ -11,67 +11,11 @@
>   	};
>   };
>   
> -&emmc_bus8 {
> -	bootph-all;
> -};
> -
> -&emmc_clk {
> -	bootph-all;
> -};
> -
> -&emmc_cmd {
> -	bootph-all;
> -};
> -
> -&emmc_datastrobe {
> -	bootph-all;
> -};
> -
> -&pinctrl {
> -	bootph-all;
> -};
> -
> -&pcfg_pull_none {
> -	bootph-all;
> -};
> -
> -&pcfg_pull_up_drv_level_2 {
> -	bootph-all;
> -};
> -
> -&pcfg_pull_up {
> -	bootph-all;
> -};
> -
> -&sdmmc0_bus4 {
> -	bootph-all;
> -};
> -
> -&sdmmc0_clk {
> -	bootph-all;
> -};
> -
> -&sdmmc0_cmd {
> -	bootph-all;
> -};
> -
> -&sdmmc0_det {
> -	bootph-all;
> -};
> -
> -&sdmmc0_pwren {
> -	bootph-all;
> -};
> -
>   &sdhci {
>   	cap-mmc-highspeed;
>   	mmc-ddr-1_8v;
>   };
>   
> -&uart2m0_xfer {
> -	bootph-all;
> -};
> -
>   &uart2 {
>   	clock-frequency = <24000000>;
>   	bootph-all;
> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> index 0ba38851c25e..45e9390f202d 100644
> --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> @@ -16,26 +16,6 @@
>   	};
>   };
>   
> -&emmc_bus8 {
> -	bootph-all;
> -};
> -
> -&emmc_clk {
> -	bootph-all;
> -};
> -
> -&emmc_cmd {
> -	bootph-all;
> -};
> -
> -&emmc_datastrobe {
> -	bootph-all;
> -};
> -
> -&fspi_pins {
> -	bootph-all;
> -};
> -
>   &pcie2x1 {
>   	pinctrl-0 = <&pcie20m1_pins &pcie_reset_h>;
>   	/* Shared vpcie3v3-supply may cause a sys freeze, disable for now */
> @@ -47,8 +27,6 @@
>   };
>   
>   &pinctrl {
> -	bootph-all;
> -
>   	pcie {
>   		pcie3x2_reset_h: pcie3x2-reset-h {
>   			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
> @@ -56,34 +34,6 @@
>   	};
>   };
>   
> -&pcfg_pull_none {
> -	bootph-all;
> -};
> -
> -&pcfg_pull_up_drv_level_2 {
> -	bootph-all;
> -};
> -
> -&pcfg_pull_up {
> -	bootph-all;
> -};
> -
> -&sdmmc0_bus4 {
> -	bootph-all;
> -};
> -
> -&sdmmc0_clk {
> -	bootph-all;
> -};
> -
> -&sdmmc0_cmd {
> -	bootph-all;
> -};
> -
> -&sdmmc0_det {
> -	bootph-all;
> -};
> -
>   &sdhci {
>   	cap-mmc-highspeed;
>   	mmc-ddr-1_8v;
> @@ -117,10 +67,6 @@
>   	status = "disabled";
>   };
>   
> -&uart2m0_xfer {
> -	bootph-all;
> -};
> -
>   &uart2 {
>   	clock-frequency = <24000000>;
>   	bootph-all;
> diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
> index c340c2bba6ff..89c0d830b632 100644
> --- a/arch/arm/dts/rk356x-u-boot.dtsi
> +++ b/arch/arm/dts/rk356x-u-boot.dtsi
> @@ -59,6 +59,70 @@
>   	status = "okay";
>   };
>   
> +&pinctrl {
> +	bootph-all;
> +};
> +
> +&pcfg_pull_none {
> +	bootph-all;
> +};
> +
> +&pcfg_pull_up_drv_level_2 {
> +	bootph-all;
> +};
> +
> +&pcfg_pull_up {
> +	bootph-all;
> +};
> +
> +&emmc_bus8 {
> +	bootph-all;
> +};
> +
> +&emmc_clk {
> +	bootph-all;
> +};
> +
> +&emmc_cmd {
> +	bootph-all;
> +};
> +
> +&emmc_datastrobe {
> +	bootph-all;
> +};
> +
> +&emmc_rstnout {
> +	bootph-all;
> +};
> +
> +&fspi_pins {
> +	bootph-all;
> +};
> +
> +&sdmmc0_bus4 {
> +	bootph-all;
> +};
> +
> +&sdmmc0_clk {
> +	bootph-all;
> +};
> +
> +&sdmmc0_cmd {
> +	bootph-all;
> +};
> +
> +&sdmmc0_det {
> +	bootph-all;
> +};
> +
> +&sdmmc0_pwren {
> +	bootph-all;
> +};
> +
> +&uart2m0_xfer {
> +	bootph-all;
> +};
> +
>   &sdhci {
>   	bootph-pre-ram;
>   	status = "okay";


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