[PATCH v1 1/2] arch: riscv: jh7110: Split the zeroing of L2 LIM on JH7110

[Bo Gan]

Hi Yanhong and others,

I've made up my own version and addressed my concerns in this patch:

https://patchwork.ozlabs.org/project/uboot/patch/1684668616-358043-1-git-send-email-ganboing@gmail.com/

Some descriptions would be similar, as they are from my previous response to Heinrich:
https://lists.denx.de/pipermail/u-boot/2023-May/518359.html

Also please note that this patch is based on
https://patchwork.ozlabs.org/project/uboot/patch/1684650044-313122-1-git-send-email-ganboing@gmail.com/

It addressed another issue with riscv stack initialization on all platforms.
Please let me know if you have any suggestions. Thanks!