[PATCH v1] vexpress_ca9x4: Enable DM_SERIAL

[Ole Orhagen]

On Thu, Feb 8, 2024 at 9:27 AM Linus Walleij <linus.walleij at linaro.org>
wrote:

> On Mon, Feb 5, 2024 at 9:18 AM Ole Orhagen <ole.orhagen at northern.tech>
> wrote:
>
>>
>> But I will try to dust it off and test it again.
>>>
>>
>> Did you get any results from the tests?
>>
>
>
> Yes!
>
> It works fine both before and after the patch. Latest log from
> the actual hardware:
>
> Cmd> usb_on
> Enabling debug USB...
>
> (here I copy over the binary to the internal SD-card which is
> presented over USB mass storage)
>
> Cmd> reboot
>
> Powering up system...
> Daughterboard fitted to site 1.
>
> Switching on ATXPSU...
> ATX3V3: ON
> VIOset: 1.8V
> MBtemp: 29 degC
>
> Configuring motherboard (rev D, var A)...
> IOFPGA  config: PASSED
> MUXFPGA config: PASSED
> OSC CLK config: PASSED
> Programming image \SOFTWARE\boot-a9.bin
> Erasing Flash image boot.bin
> ...
> Erasing Flash
> ...
> Writing Flash
> .....
> Updating eeprom with image boot.bin
> Image: boot.bin UPDATED from \SOFTWARE\boot-a9.bin
>
> Testing SMC devices (FPGA build 8)...
> SRAM 32MB test: PASSED
> VRAM  8MB test: PASSED
> LAN9118   test: PASSED
> USB & OTG test: PASSED
> KMI1/KMI2 test: PASSED
> MMC & SD  test: PASSED
> DVI image test: PASSED
> AACI AC97 test: PASSED
> CF card   test: PASSED
> UART port test: PASSED
> MAC addrs test: PASSED
>
> Reading Site 1 Board File \SITE1\HBI0191B\board.txt
> DB1 JTAG configuration complete.
> Setting DB1 OSCCLKS...
> DB1.0 DCC 0 SPI configuration complete.
>
> Writing SCC 0x40610000 with 0xBB8A802A
> Writing SCC 0x40610001 with 0x00001F09
> Writing SCC 0x40610002 with 0x00000000
> DB1.0 DCC 0 SCC configuration complete.
>
> DB SMB clock enabled.
> Waiting for SITE1 CB_READY...
> Testing SMB clock...
> Configuring MUXFPGA for DB1.
> Setting DVI mode for XGA.
> Releasing Daughterboard resets.
> Switching MCC log to UART1.
>
> ARM Versatile Express Boot Monitor
> Version:    V5.2.1
> Build Date: Apr  4 2013
> Daughterboard Site 1: V2P-CA9 Cortex A9
> Daughterboard Site 2: Not Used
> Running boot script from flash - BOOTSCRIPT
>
>
> U-Boot 2024.04-rc1-00101-g0101a2ffe125 (Feb 08 2024 - 09:21:31 +0100)
>
> DRAM:  512 MiB (effective 1 GiB)
> WARNING: Caches not enabled
> Core:  22 devices, 11 uclasses, devicetree: embed
> Flash: 128 MiB
> MMC:   mmci at 5000: 0
> Loading Environment from Flash... OK
> In:    uart at 9000
> Out:   uart at 9000
> Err:   uart at 9000
> Net:   eth0: ethernet at 3,02000000
> Hit any key to stop autoboot:  0
> smc911x: detected LAN9118 controller
> smc911x: phy initialized
> smc911x: MAC 00:02:f7:00:3c:9d
> Using ethernet at 3,02000000 device
> TFTP from server 192.168.1.140; our IP address is 192.168.1.35
> Filename 'zImage'.
> Load address: 0x62000000
> Loading: smc911x: MAC 00:02:f7:00:3c:9d
>
> Yours,
> Linus Walleij
>


Great :)

Thanks for taking the time!

-- 
*Ole P. Orhagen*
Software Engineer | Mender <https://mender.io>
Oslo, Norway
<https://www.linkedin.com/company/northern.tech>
<https://twitter.com/northerntechhq> <https://northern.tech> Northern.tech
<https://northern.tech> | Securing the world's connected devices