[PATCH 2/2] board: visionfive2: configure PHY pad drive strength

[Lukasz Tekieli]

Configure the pad drive strength register for both PHYs.
The values correspond to what can be found in the Linux DTS
for VisionFive2 v1.3b.

Pad drive strength configuration is required for the phy0 to work correctly
with 100Mbit links.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz at gmail.com>
---
 board/starfive/visionfive2/spl.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index 336f0cdfc90..ba9c62f2f97 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -44,6 +44,10 @@ static const struct starfive_vf2_pro starfive_verb[] = {
 		"motorcomm,tx-clk-100-inverted", NULL},
 	{"/soc/ethernet at 16030000/mdio/ethernet-phy at 0",
 		"motorcomm,tx-clk-1000-inverted", NULL},
+	{"/soc/ethernet at 16030000/mdio/ethernet-phy at 0",
+		"motorcomm,rx-clk-drv-microamp", "3970"},
+	{"/soc/ethernet at 16030000/mdio/ethernet-phy at 0",
+		"motorcomm,rx-data-drv-microamp", "2910"},
 	{"/soc/ethernet at 16030000/mdio/ethernet-phy at 0",
 		"rx-internal-delay-ps", "1900"},
 	{"/soc/ethernet at 16030000/mdio/ethernet-phy at 0",
@@ -53,6 +57,10 @@ static const struct starfive_vf2_pro starfive_verb[] = {
 		"motorcomm,tx-clk-adj-enabled", NULL},
 	{ "/soc/ethernet at 16040000/mdio/ethernet-phy at 1",
 		"motorcomm,tx-clk-100-inverted", NULL},
+	{"/soc/ethernet at 16040000/mdio/ethernet-phy at 1",
+		"motorcomm,rx-clk-drv-microamp", "3970"},
+	{"/soc/ethernet at 16040000/mdio/ethernet-phy at 1",
+		"motorcomm,rx-data-drv-microamp", "2910"},
 	{"/soc/ethernet at 16040000/mdio/ethernet-phy at 1",
 		"rx-internal-delay-ps", "0"},
 	{"/soc/ethernet at 16040000/mdio/ethernet-phy at 1",
-- 
2.39.2