[PATCH 1/1] socfpga_de1_soc: Specify Uart clock in dts

[Chee, Tien Fong]

> -----Original Message-----
> From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of "Alexander
> Daum"
> Sent: Wednesday, January 4, 2023 5:11 AM
> To: u-boot at lists.denx.de
> Cc: "Alexander Daum" <alexander.daum at mailbox.org>
> Subject: [PATCH 1/1] socfpga_de1_soc: Specify Uart clock in dts
> 
> UART output was broken since commit c402e8170245 ("dts: arm: socfpga:
> merge gen5 devicetrees from linux"), when uart clocks where removed from
> socfpga.dtsi
> 
> This patch specifies the uart clock for DE1-SoC board.
> 
> Signed-off-by: Alexander Daum <alexander.daum at mailbox.org>
> ---
>  arch/arm/dts/socfpga_cyclone5_de1_soc.dts | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> index ff1e61e0cb..f4935d0689 100644
> --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> @@ -76,6 +76,7 @@
> 
>  &uart0 {
>  	u-boot,dm-pre-reloc;
> +	clock-frequency = <100000000>;
>  };
> 
>  &watchdog0 {

Reviewed-by: Tien Fong Chee <tien.fong.chee at intel.com>

Regards
Tien Fong