[PATCH 00/12] rockchip: rk3399: Migrate to use TPL on bob and kevin

Kever Yang kever.yang at rock-chips.com
Fri Jan 10 08:09:33 CET 2025


Hi Tom,

On 2024/12/21 00:29, Tom Rini wrote:
> On Fri, Dec 20, 2024 at 05:22:28PM +0100, Jonas Karlman wrote:
>> Hi Simon,
>>
>> On 2024-12-13 04:09, Simon Glass wrote:
>>> Hi Jonas,
>>>
>>> On Thu, 12 Dec 2024 at 16:57, Jonas Karlman <jonas at kwiboo.se> wrote:
>>>> This is a continuation of an RFC [1] sent back in August.
>>>>
>>>> All Rockchip aarch64 boards, beside bob and kevin, use TPL to initialize
>>>> DRAM and SPL to load FIT with U-Boot proper and TF-A.
>>>>
>>>> Bob and kevin currently does not use TPL and instead initialize DRAM
>>>> in SPL and directly after tries to load a FIT with only U-Boot proper.
>>>>
>>>> This series migrate bob and kevin to also use TPL to uniform TPL/SPL use
>>>> for all Rockchip aarch64 boards.
>>>>
>>>> Features and changes in this series:
>>>> - Use of Rockchip aarch64 common bss and stack addresses
>>>> - SHA256 checksum/signature check of FIT images in SPL
>>>> - Use of dcache to speed up checksum check in SPL
>>>> - SDMA use for eMMC access to speed up read/write in U-Boot proper
>>>> - FIT location moved from 0x40000 to 0xE0000 in SPI flash
>>>>
>>>> Changes sinc RFC:
>>>> - Include pinctrl props and enable regulators based on DT in SPL
>>>> - Drop bob and kevin board specific code from common rk3399.c
>>>>
>>>> Please note that I do not have any bob or kevin so this has only been
>>>> compile tested and the original RFC [1] was runtime tested by Simon.
>>>>
>>>> [1] https://patchwork.ozlabs.org/patch/1967517/
>>>>
>>>> Jonas Karlman (12):
>>>>    rockchip: rk3399: Fix TPL build of bob and kevin
>>>>    rockchip: rk3399-gru: Use SYS_SPI_U_BOOT_OFFS value in offset prop
>>>>    rockchip: rk3399-gru: Move SPI flash payload offset for bob and kevin
>>>>    rockchip: rk3399-gru: Fix include of TPL in u-boot.rom image
>>>>    rockchip: rk3399-gru: Use TPL with common bss and stack addresses
>>>>    rockchip: rk3399-gru: Include binman generated FIT in u-boot.rom image
>>>>    rockchip: rk3399: Drop common Kconfig options already implied
>>>>    rockchip: rk3399-gru: Remove unused nodes from xPL control FDT
>>>>    rockchip: rk3399-gru: Enable dcache and signature validation in SPL
>>>>    rockchip: rk3399-gru: Use SDMA mode to read from eMMC
>>>>    rockchip: rk3399-gru: Include pinctrl and regulators in SPL
>>>>    rockchip: rk3399: Drop unneeded bob and kevin board specific code
>>>>
>>>>   arch/arm/dts/rk3399-gru-u-boot.dtsi    | 29 ++++++++++++++++++++++++--
>>>>   arch/arm/dts/rk3399-u-boot.dtsi        | 14 +++++++++++--
>>>>   arch/arm/mach-rockchip/rk3399/Kconfig  | 12 -----------
>>>>   arch/arm/mach-rockchip/rk3399/rk3399.c | 23 +-------------------
>>>>   configs/chromebook_bob_defconfig       | 23 ++++++--------------
>>>>   configs/chromebook_kevin_defconfig     | 23 ++++++--------------
>>>>   6 files changed, 52 insertions(+), 72 deletions(-)
>>> Thank you for doing this!
>>>
>>> I'm not sure if you have access to your own denx tree. If so, kevin
>>> and bob are in the sjg lab. If not, you can sign up at sjg.u-boot.org
>>> to get access to my tree.
>> I do not have access to my own tree.
>>
>>> This series eems to work for me, except for the final commit, which
>>> hangs with no output.
>> Strange, guess we can just skip the last patch, should I send a v2
>> without the last patch?
>>
>> I wonder if it is not setting io_vsel or the regulators that is causing
>> an issue. Setting io_vsel is probably delayed until U-Boot proper
>> instead of being set very early in SPL (due to no IO-domain driver in
>> SPL), and enable of regulators may happen later in SPL with the last
>> patch applied.
>>
>> There is also some code in board/google/gru/gru.c that mention a delay
>> related to the regulators may be needed, however board_early_init_f() is
>> never called as following can be found in .config:
>>
>>    # CONFIG_BOARD_EARLY_INIT_F is not set
>>
>> Will you be able to test with just the rk_setreg(&grf->io_vsel, 1 << 0);
>> and remove the spl_gpio_output/set_pull parts of the last patch before I
>> send a v2?
> If you send a v2, please include disabling TPL_BLOBLIST and then the
> boards should boot in mainline as well as Simon's tree. Thanks!
Do you mean add below code in configs/chromebook_bob_defconfig and
configs/chromebook_kevin_defconfig will make this patch set available?
  # CONFIG_TPL_BLOBLIST is not set
If yes, then I can do that when apply the patches.

Thanks,
- Kever
>


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