[PATCH 1/3] rockchip: i2c: fix incorrect STOP flag for the interrupt enable register

[Kever Yang]

On 2025/11/7 19:39, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz at cherry.de>
>
> I2C_CON_STOP is a flag to be used for the con register, where it is bit
> 4 to send the STOP condition.
>
> To enable the interrupt the controller sends to tell it's finished
> sending the STOP condition, it's the ien register at bit 5.
>
> Let's use the proper offset.
>
> My hunch is that enabling the interrupt is useless as the interrupt
> status register is always up-to-date and enabling the interrupt is just
> so that the interrupt is available via the GIC. However, U-Boot has no
> interrupt support and the logic was working well before this patch. This
> is just so people aren't side-tracked when debugging I2C issues on
> Rockchip by checking all writes are proper.
>
> Fixes: 3437469985df ("rockchip: Add I2C driver")
> Signed-off-by: Quentin Schulz <quentin.schulz at cherry.de>

Rockchip vendor U-Boot has  the same fixes.


Reviewed-by: Kever Yang <kever.yang at rock-chips.com>


Thanks,
- Kever
> ---
>   drivers/i2c/rk_i2c.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
> index fa167268ae7..fe09e75d3fb 100644
> --- a/drivers/i2c/rk_i2c.c
> +++ b/drivers/i2c/rk_i2c.c
> @@ -137,7 +137,7 @@ static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
>   	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
>   
>   	writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
> -	writel(I2C_CON_STOP, &regs->ien);
> +	writel(I2C_STOPIEN, &regs->ien);
>   
>   	start = get_timer(0);
>   	while (1) {
>