[PATCH 03/11] spi: zynqmp_gqspi: Read two bytes of SR and FSR in parallel mode

Takahiro Kuwano via B4 Relay devnull+Takahiro.Kuwano.infineon.com at kernel.org
Wed Nov 19 06:13:02 CET 2025


From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>

In parallel mode, status register value of two chips need to be read
and evaluated. Currenlty spi-nor-core takes care for that by reading
two bytes and performing logical AND of two bytes for read_sr() and
read_fsr(), assuming the controller performs byte interleaving in
parallel mode, but it depends on controller specification.

Controller driver should take care for parallel mode to read status
registers.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
---
 drivers/spi/zynqmp_gqspi.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 143b957516b..c6cd706574e 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -867,11 +867,23 @@ static bool zynqmp_qspi_update_stripe(const struct spi_mem_op *op)
 	}
 }
 
+static bool zynqmp_qspi_is_read_status(const struct spi_mem_op *op)
+{
+	switch (op->cmd.opcode) {
+	case SPINOR_OP_RDSR:
+	case SPINOR_OP_RDFSR:
+		return true;
+	}
+
+	return false;
+}
+
 static int zynqmp_qspi_exec_op(struct spi_slave *slave,
 			       const struct spi_mem_op *op)
 {
 	struct zynqmp_qspi_priv *priv = dev_get_priv(slave->dev->parent);
 	int ret = 0;
+	u8 sr_buf[2];
 
 	priv->op = op;
 	priv->tx_buf = op->data.buf.out;
@@ -891,6 +903,10 @@ static int zynqmp_qspi_exec_op(struct spi_slave *slave,
 			priv->bus = 1;
 		if (zynqmp_qspi_update_stripe(op))
 			priv->stripe = 1;
+		if (zynqmp_qspi_is_read_status(op)) {
+			priv->rx_buf = sr_buf;
+			priv->len = 2;
+		}
 	}
 
 	zynqmp_qspi_chipselect(priv, 1);
@@ -904,6 +920,9 @@ static int zynqmp_qspi_exec_op(struct spi_slave *slave,
 	else if (op->data.dir == SPI_MEM_DATA_OUT)
 		ret = zynqmp_qspi_genfifo_fill_tx(priv);
 
+	if (priv->is_parallel && zynqmp_qspi_is_read_status(op))
+		*(u8 *)op->data.buf.in = sr_buf[0] & sr_buf[1];
+
 	zynqmp_qspi_chipselect(priv, 0);
 
 	return ret;

-- 
2.34.1




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