[PATCH 02/11] spi: zynqmp_gqspi: Remove reference to SPI_XFER_LOWER flag.

[Takahiro Kuwano via B4 Relay]

From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>

SPI_XFER_LOWER is set in spi-nor-core for reading ID, SFDP and BAR.
The flag is referenced by AMD controllers only. Controller drivers can
intercept the opcode and change its settings accordingly.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
---
 drivers/spi/zynqmp_gqspi.c | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 4a25ee0c459..143b957516b 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -823,6 +823,23 @@ static int zynqmp_qspi_release_bus(struct udevice *dev)
 	return 0;
 }
 
+static bool zynqmp_qspi_is_lower_only(const struct spi_mem_op *op)
+{
+	/*
+	 * This is a list of opcodes for which we must read only from lower chip
+	 * in dual parallel mode.
+	 */
+	switch (op->cmd.opcode) {
+	case SPINOR_OP_RDID:
+	case SPINOR_OP_RDSFDP:
+	case SPINOR_OP_BRRD:
+	case SPINOR_OP_RDEAR:
+		return true;
+	}
+
+	return false;
+}
+
 static bool zynqmp_qspi_update_stripe(const struct spi_mem_op *op)
 {
 	/*
@@ -870,7 +887,7 @@ static int zynqmp_qspi_exec_op(struct spi_slave *slave,
 	priv->bus = 0;
 
 	if (priv->is_parallel) {
-		if (slave->flags & SPI_XFER_LOWER)
+		if (zynqmp_qspi_is_lower_only(op))
 			priv->bus = 1;
 		if (zynqmp_qspi_update_stripe(op))
 			priv->stripe = 1;
@@ -889,8 +906,6 @@ static int zynqmp_qspi_exec_op(struct spi_slave *slave,
 
 	zynqmp_qspi_chipselect(priv, 0);
 
-	slave->flags &= ~SPI_XFER_LOWER;
-
 	return ret;
 }
 

-- 
2.34.1