[PATCH v1] SDRAM Calibration Failed fix for GEN5 SoCFPGA

[Sune Brian]

> That's a bandage fix. It would be better to have some idea of what's
> going on. If this is possible, bisecting between a known working and
> broken commits would hopefully return the culprit and we can start
> making educated guesses from there. I also see no defconfig in upstream
> with TARGET_SOCFPGA_GEN5

I am terribly sorry this is completely out of my capability.
I really dont know how to do it.

Why I raised this patch is b.c. The diff does show a very distinct difference on
Altera trunk and mainstream.

And I did try what you had proposed (delay) and zero different b.c.
that calibration
is under a long test somehow. I even tried adding a redo counter. And also had
tried to check what was done before and after the calibration and no major
diff was found. So to simply generalize the issue I patched this patch.

If you had a clue that is not the case then I am 100% wrong not to be shamed.
I did not undergo code investigation first, I did it by reverse
behavioral observation.

Bests,
Brian