[PATCH v3] SDRAM Calibration Failed fix for GEN5 SoCFPGA

[Quentin Schulz]

Hi Brian,

On 11/25/25 10:33 PM, Sune Brian wrote:
>> Are you even sure SPL_CYCLIC is required? Wouldn't enabling CYCLIC be
>> enough?
> 
> Short test answer is no. SPL_CYCLIC must be init with default timeout #.
> 
>> Since you have not identified the root issue yet, can you please provide
>> the actual defconfig used before this change so we can figure out what
>> is happening, if other boards are impacted and how to fix it properly so
>> this possible misconfiguration cannot happen anymore?
> 
> socfpga_cyclone5_defconfig
> 

So, this does NOT enable WDT or WATCHDOG. It does force SPL_WATCHDOG on 
but that doesn't seem to do anything except if SPL_WDT is also set, in 
which case it'll then selects SPL_CYCLIC automatically. Can you walk us 
step by step through how you get this into this broken state?

git clone https://source.denx.de/u-boot/u-boot.git
cd u-boot
git checkout origin/master
make CROSS_COMPILE=arm-linux-gnu- socfpga_cyclone5_defconfig
and then...?

Does it happen with the default socfpga_cyclone5_defconfig defconfig?

What do you do next? Do you run "make menuconfig" to enable/disable some 
options? Which ones?

> But my patch did not target ONE config file. Because the risk or possible
> hazard could happen on other GEN5 socfpga. Need others to report btw.

Yes, but I only want at least one board this happens on so we can try 
figure out exactly what happens with this watchdog.

> b.c. it requires complete fresh build to trigger possibly.
> 

What do you mean it requires a complete fresh build?

Cheers,
Quentin