[PATCH v2 11/18] rockchip: odroid-go2: Add support for SPI flash boot
Kever Yang
kever.yang at rock-chips.com
Sun Oct 26 16:45:14 CET 2025
On 2025/9/1 00:49, Jonas Karlman wrote:
> The ODROID GO2 devices come with onboard SPI flash, add support for
> using the SPI flash.
>
> The BootROM seem to expect the IDBlock at 64 KiB offset compared to the
> typical 32 KiB offset from start of SPI flash used by other SoCs.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> v2: No change
> ---
> arch/arm/dts/rk3326-u-boot.dtsi | 18 +++++++++++++++++-
> configs/odroid-go2_defconfig | 11 +++++++++++
> 2 files changed, 28 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/rk3326-u-boot.dtsi b/arch/arm/dts/rk3326-u-boot.dtsi
> index 196604a9987c..be1dd4f91c1b 100644
> --- a/arch/arm/dts/rk3326-u-boot.dtsi
> +++ b/arch/arm/dts/rk3326-u-boot.dtsi
> @@ -6,8 +6,12 @@
> #include "rockchip-u-boot.dtsi"
>
> / {
> + aliases {
> + spi2 = &sfc;
> + };
> +
> chosen {
> - u-boot,spl-boot-order = &sdmmc;
> + u-boot,spl-boot-order = "same-as-spl", &sdmmc;
> };
>
> dmc {
> @@ -22,6 +26,17 @@
> };
> };
>
> +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
> +&binman {
> + simple-bin-spi {
> + mkimage {
> + args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
> + offset = <0x10000>;
> + };
> + };
> +};
> +#endif
> +
> &cru {
> bootph-all;
> };
> @@ -102,6 +117,7 @@
>
> &sfc {
> bootph-some-ram;
> + u-boot,spl-sfc-no-dma;
> };
>
> &sfc_bus2 {
> diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
> index a6d02baa520f..09ba6b7fcfaa 100644
> --- a/configs/odroid-go2_defconfig
> +++ b/configs/odroid-go2_defconfig
> @@ -3,17 +3,23 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
> CONFIG_COUNTER_FREQUENCY=24000000
> CONFIG_ARCH_ROCKCHIP=y
> CONFIG_NR_DRAM_BANKS=1
> +CONFIG_SF_DEFAULT_SPEED=108000000
> +CONFIG_SF_DEFAULT_MODE=0x1000
> CONFIG_ENV_SIZE=0x4000
> CONFIG_ENV_OFFSET=0x4000
> CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3326-odroid-go2"
> CONFIG_DM_RESET=y
> CONFIG_ROCKCHIP_PX30=y
> CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
> CONFIG_TARGET_ODROID_GO2=y
> CONFIG_DEBUG_UART_CHANNEL=1
> CONFIG_SYS_LOAD_ADDR=0x800800
> +CONFIG_SF_DEFAULT_BUS=2
> CONFIG_DEBUG_UART_BASE=0xFF160000
> CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
> CONFIG_DEBUG_UART=y
> # CONFIG_ANDROID_BOOT_IMAGE is not set
> CONFIG_FIT=y
> @@ -30,6 +36,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y
> # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> CONFIG_SPL_I2C=y
> CONFIG_SPL_POWER=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
> CONFIG_SPL_ATF=y
> # CONFIG_TPL_FRAMEWORK is not set
> # CONFIG_TPL_BANNER_PRINT is not set
> @@ -70,6 +78,8 @@ CONFIG_MISC=y
> CONFIG_ROCKCHIP_OTP=y
> CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_XTX=y
> CONFIG_PINCTRL=y
> CONFIG_SPL_PINCTRL=y
> CONFIG_DM_PMIC=y
> @@ -87,6 +97,7 @@ CONFIG_ROCKCHIP_SDRAM_COMMON=y
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYS_NS16550_MEM32=y
> CONFIG_SOUND=y
> +CONFIG_ROCKCHIP_SFC=y
> CONFIG_SYSRESET=y
> CONFIG_DM_THERMAL=y
> CONFIG_USB=y
--
Thanks & Best regards,
Kever Yang
**************************************************************************************************
杨凯 市场部 Kever Yang Marketing Department
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