[PATCH v3 1/2] drivers: clk: agilex: Fix EMAC clock source selection

[Chee, Tien Fong]

> -----Original Message-----
> From: Ravulapalli, Naresh Kumar <naresh.kumar.ravulapalli at altera.com>
> Sent: Thursday, 11 September, 2025 1:21 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marek.vasut at mailbox.org>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at altera.com>; Tom Rini <trini at konsulko.com>; Ravulapalli,
> Naresh Kumar <naresh.kumar.ravulapalli at altera.com>
> Subject: [PATCH v3 1/2] drivers: clk: agilex: Fix EMAC clock source selection
> 
> Fix the incorrect bit masking and bit shift used to compute EMAC control which
> in turn is used to select EMAC clock from EMAC source A or B.
> 
> Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli at altera.com>
> ---
>  drivers/clk/altera/clk-agilex.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c index
> 242740a4b00..16a37b962cd 100644
> --- a/drivers/clk/altera/clk-agilex.c
> +++ b/drivers/clk/altera/clk-agilex.c
> @@ -544,14 +544,14 @@ static u32 clk_get_emac_clk_hz(struct
> socfpga_clk_plat *plat, u32 emac_id)
>  	/* Get EMAC clock source */
>  	ctl = CM_REG_READL(plat, CLKMGR_PERPLL_EMACCTL);
>  	if (emac_id == AGILEX_EMAC0_CLK)
> -		ctl = (ctl >>
> CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_OFFSET) &
> -		       CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_MASK;
> +		ctl = (ctl &
> CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_MASK) >>
> +			CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_OFFSET;
>  	else if (emac_id == AGILEX_EMAC1_CLK)
> -		ctl = (ctl >>
> CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_OFFSET) &
> -		       CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_MASK;
> +		ctl = (ctl &
> CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_MASK) >>
> +			CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_OFFSET;
>  	else if (emac_id == AGILEX_EMAC2_CLK)
> -		ctl = (ctl >>
> CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_OFFSET) &
> -		       CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_MASK;
> +		ctl = (ctl &
> CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_MASK) >>
> +			CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_OFFSET;
>  	else
>  		return 0;
> 
> --
> 2.35.3

Reviewed-by: Tien Fong Chee <tien.fong.chee at altera.com>

Best regards,
Tien Fong