[GIT,PULL] u-boot-riscv/next

[Yao Zi]

On Wed, Sep 24, 2025 at 08:39:26PM -0700, E Shattow wrote:
> 
> On 9/24/25 19:07, E Shattow wrote:
> > Hi Tom, Leo, and Yao,
> > 
> > On 9/20/25 10:47, Tom Rini wrote:
> >> On Sat, 20 Sep 2025 18:20:01 +0800, Leo Liang wrote:
> >>
> >>> The following changes since commit a209627ed7921f40669f5c0795570d40e77e4cb7:
> >>>
> >>>   Merge patch series "board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()" (2025-09-16 16:14:30 -0600)
> >>>
> >>> are available in the Git repository at:
> >>>
> >>>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git next
> >>>
> >>> [...]
> >>
> >> Merged into u-boot/next, thanks!
> >>
> > 
> > Runtime regression for VisionFive2 SPL bisected to bad commit
> > a681cfecb434 "riscv: Add a Zalrsc-only alternative for synchronization
> > in start.S". Confirmed by checking out origin/next (to 44c4919e9 "test:
> > Fix optee unit test") and reverting that commit a681cfecb434 only.
> > 
> > I am late to testing this, sorry about that. It would have been better
> > to catch this before becoming part of a range of bisect commits that now
> > have a non-functional SPL on visionfive2.
> > 
> > Best regards,
> > 
> > -E
> 
> P.S. for Yao, there are problems with your series more than the one bad
> bisect commit only. Build starfive_visionfive2_defconfig with ordinary
> toolchain from Debian 13 Trixie gcc 14.2.0 and any StarFive2 (or
> variant) board, to see the problem. I can't get this working with only
> config changes and your series for a fixes follow-up. Too heavy of a
> change... revert the series please. -E

Oops, I'm okay with the revert. Should I send a series to revert the
changes?

I should really have tested this against VisonFive 2, but my board is
dead...

Best regards,
Yao Zi