[PATCH 3/9] arm: dts: Add HPE GSC device tree

[Tom Rini]

On Wed, Apr 08, 2026 at 07:24:15PM +0000, Jorge Cisneros wrote:

> Add device tree for the HPE GSC SoC including:
> - Dual Cortex-A35 cores with spin-table enable method
> - GICv3 interrupt controller
> - NS16550A compatible UART
> - GXP timer and SPI/I2C controllers (shared IP blocks)
> - Two Cadence GEM Ethernet MACs with SGMII PHYs
> - Synopsys DWC MSHC eMMC controller
> - GSC watchdog timer
> - Memory-mapped virtual EEPROM for VPD storage
> - Fixed clock definitions for peripheral buses
> 
> Signed-off-by: Jorge Cisneros <jorge.cisneros at hpe.com>
> ---
>  arch/arm/dts/hpe-gsc.dts | 146 +++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 146 insertions(+)

What is the status of getting this supported in the upstream kernel?
I do see dts/upstream/src/arm/hpe/hpe-gxp.dtsi for example.  Thanks.

-- 
Tom
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