[PATCH v1] drivers: clk: agilex5: Setting correct counter frequency in boot mode

[NG, BOON KHAI]

Re-add Tien Fong's Altera Email, with the patch's content.

> 
>  
> From: Tien Fong Chee <tien.fong.chee at intel.com>
> 
> Counter frequency need to be set in 200Mhz when system in boot mode.
> 400Mhz need to be set when system exit the boot mode with the PLL
> generating the high frequency clock set by user.
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> Signed-off-by: Boon Khai Ng <boon.khai.ng at altera.com>
> ---
>  arch/arm/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 5508fce796a..4cc42ca393b 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -30,6 +30,7 @@ config COUNTER_FREQUENCY
>                          ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
>          default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
>          default 100000000 if ARCH_ZYNQMP
> +       default 400000000 if ARCH_SOCFPGA && ARM64 && !TARGET_SOCFPGA_AGILEX5
>          default 200000000 if ARCH_SOCFPGA_AGILEX5 || ARCH_SOCFPGA_AGILEX7M
>          default 0
>          help
> --
> 2.43.7
>