[PATCH 1/2] gpio: qcom_pmic_gpio: implement standard pinconf parameters

[Petr Hodina via B4 Relay]

From: Petr Hodina <petr.hodina at protonmail.com>

Set bias-pull-up/down/disable, input-enable and the vendor
qcom,drive-strength properties in pinconf_params.

Signed-off-by: Petr Hodina <petr.hodina at protonmail.com>
---
 drivers/gpio/qcom_pmic_gpio.c | 35 ++++++++++++++++++++++++++++++++---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
index 4458c55cd3d..71cc76fef2f 100644
--- a/drivers/gpio/qcom_pmic_gpio.c
+++ b/drivers/gpio/qcom_pmic_gpio.c
@@ -56,6 +56,8 @@
 #define REG_DIG_VIN_VIN0       0
 
 #define REG_DIG_PULL_CTL       0x42
+#define REG_DIG_PULL_UP_30K    0x0
+#define REG_DIG_PULL_DN        0x4
 #define REG_DIG_PULL_NO_PU     0x5
 
 #define REG_LV_MV_OUTPUT_CTL	0x44
@@ -365,6 +367,11 @@ U_BOOT_DRIVER(qcom_pmic_gpio) = {
 static const struct pinconf_param qcom_pmic_pinctrl_conf_params[] = {
 	{ "output-high", PIN_CONFIG_OUTPUT_ENABLE, 1 },
 	{ "output-low", PIN_CONFIG_OUTPUT, 0 },
+	{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
+	{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 0 },
+	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 0 },
+	{ "qcom,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
 };
 
 static int qcom_pmic_pinctrl_get_pins_count(struct udevice *dev)
@@ -387,9 +394,31 @@ static const char *qcom_pmic_pinctrl_get_pin_name(struct udevice *dev, unsigned
 static int qcom_pmic_pinctrl_pinconf_set(struct udevice *dev, unsigned int selector,
 					 unsigned int param, unsigned int arg)
 {
-	/* We only support configuring the pin as an output, either low or high */
-	return _qcom_gpio_set_direction(dev, selector, false,
-					param == PIN_CONFIG_OUTPUT_ENABLE);
+	struct qcom_pmic_gpio_data *plat = dev_get_plat(dev);
+	u32 gpio_base = plat->pid + REG_OFFSET(selector);
+
+	switch (param) {
+	case PIN_CONFIG_OUTPUT_ENABLE:
+	case PIN_CONFIG_OUTPUT:
+		return qcom_gpio_set_direction(dev, selector, false,
+					       param == PIN_CONFIG_OUTPUT_ENABLE);
+	case PIN_CONFIG_INPUT_ENABLE:
+		return qcom_gpio_set_direction(dev, selector, true, 0);
+	case PIN_CONFIG_BIAS_PULL_UP:
+		return pmic_reg_write(plat->pmic, gpio_base + REG_DIG_PULL_CTL,
+				      REG_DIG_PULL_UP_30K);
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		return pmic_reg_write(plat->pmic, gpio_base + REG_DIG_PULL_CTL,
+				      REG_DIG_PULL_DN);
+	case PIN_CONFIG_BIAS_DISABLE:
+		return pmic_reg_write(plat->pmic, gpio_base + REG_DIG_PULL_CTL,
+				      REG_DIG_PULL_NO_PU);
+	case PIN_CONFIG_DRIVE_STRENGTH:
+		return pmic_reg_write(plat->pmic, gpio_base + REG_DIG_OUT_CTL,
+				      REG_DIG_OUT_CTL_CMOS | (arg & 0x3));
+	default:
+		return -EOPNOTSUPP;
+	}
 }
 
 static const char *qcom_pmic_pinctrl_get_function_name(struct udevice *dev, unsigned int selector)

-- 
2.53.0