[PATCH v4 1/4] imx9: Add support for saving DDR training data to NVM

[Marek Vasut]

On 6/2/26 4:11 PM, Marek Vasut wrote:
> On 6/2/26 3:46 PM, Simona Toaca wrote:
> 
> Hi,
> 
>>>> +    ret = spi_flash_erase_dm(flash, offset, QB_STATE_LOAD_SIZE);
>>> Can you please double-check whether "offset" here is always aligned 
>>> to 64
>>> kiB (SPI NOR erase block size) ? If not, this erase here will fail.
>>>
>>> Thank you
>>
>> The erase size of the SPI NOR should actually be 4kiB.
> 
> That does not apply to all devices. I assume to align this data to 64 
> kiB offset, I would need a replacement AHAB container?
> 
>> I added
>> a patch a while back enabling SFDP support, so that the erase size is
>> parsed correctly and this does not fail. I only enabled it on U-Boot,
>> but if you are using SPL you should enable it there too.
>>
>> The only reason why I did not enable it for SPL is that there seems
>> to not be any defconfig for iMX95/943/952 for booting from SPI NOR.
>>
>> Trying 'qb save spi' from eMMC on an iMX943 EVK (with SFDP enabled):
>> u-boot=> qb save spi
>> SF: Detected mt35xu512aba with page size 256 Bytes, erase size 4 KiB,
>> total 64 MiB
>> u-boot=> echo $?
>> 0
>>
>> Without SFDP, 'sf probe' reports 128kiB erase size, not 64kiB.
>>
>> I also do not see why I would check if the offset is a multiple of
>> the erase size, since the erase fails gracefully.
> My understanding is, that the erase operation should erase the QB data 
> from the SPI NOR, not ignore failure and keep the data there ?

It seems that on iMX95 B0, the DDR_DUMMY offset is 0x76400 (aligned to 1 
kiB, which is too low):

"
$ hexdump -vC flash.bin | grep -A 1 ^00008000
00008000  02 a0 02 87 10 00 00 00  00 00 00 05 90 02 00 00
00008010  00 64 07 00 00 00 00 00  00 00 00 00 00 00 00 00
           ^^^^^^^^^^^
"

But if I add the patch below, the offset gets aligned to 64 kiB at 0x78000:

"
$ hexdump -vC flash.bin | grep -A 1 ^00008000
00008000  02 a0 02 87 10 00 00 00  00 00 00 05 90 02 00 00
00008010  00 80 07 00 00 00 00 00  00 00 00 00 00 00 00 00
           ^^^^^^^^^^^
"

This makes the "qb save" work reliably even on SPI NOR, because the 
erase block is aligned to 64 kiB instead of 1 kiB as it was before. 
Maybe we need such an alignment change ?

"
diff --git a/tools/imx8image.c b/tools/imx8image.c
index 3cea536b8e8..09446142646 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -9,6 +9,13 @@
  #include <image.h>
  #include <linux/sizes.h>

+#define roundup(x, y) (                                        \
+{                                                      \
+       const typeof(y) __y = y;                        \
+       (((x) + (__y - 1)) / __y) * __y;                \
+}                                                      \
+)
+
  static int p_idx;
  static int sector_size;
  static soc_type_t soc;
@@ -647,7 +654,7 @@ static void set_image_array_entry(flash_header_v3_t 
*container,
                         /* if at least 2 images in container, [0] and 
[1] */
                         boot_img_t *ddr_dummy = 
&container->img[container->num_images - 1];
                         if ((ddr_dummy->hab_flags & 0x0F) == 
IMG_TYPE_DDR_DUMMY) {
-                               ddr_dummy->offset = img->offset + img->size;
+                               ddr_dummy->offset = roundup(img->offset 
+ img->size, 65536);
                                 set_image_hash(ddr_dummy, "/dev/null", 
IMAGE_HASH_ALGO_DEFAULT);
                         }
                 }
"