[PATCH v3 1/2] riscv: Make RISCV_ACLINT visible
Michal Simek
michal.simek at amd.com
Mon Jun 8 10:45:02 CEST 2026
On 5/15/26 14:47, Michal Simek wrote:
> A platform (like Xilinx Microblaze V) does not have an ACLINT (Advanced
> Core Local Interruptor) hardware block.
>
> Make RISCV_ACLINT and SPL_RISCV_ACLINT Kconfig symbols visible with
> prompts.
>
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
>
> Changes in v3:
> - don't enable it default because it is breaking some boards
>
> Changes in v2:
> - Make symbols visible and disable them per platform basis
>
> arch/riscv/Kconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index ad7589123c6c..e3adc48f6f52 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -378,7 +378,7 @@ config DMA_ADDR_T_64BIT
> default y if 64BIT
>
> config RISCV_ACLINT
> - bool
> + bool "RISC-V ACLINT support"
> depends on RISCV_MMODE
> select REGMAP
> select SYSCON
> @@ -387,7 +387,7 @@ config RISCV_ACLINT
> associated with software and timer interrupts.
>
> config SPL_RISCV_ACLINT
> - bool
> + bool "RISC-V ACLINT support in SPL"
> depends on SPL_RISCV_MMODE
> select SPL_REGMAP
> select SPL_SYSCON
Yao/Rick: Can you please review these 2 patches?
Thanks,
Michal
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