[PATCH] drivers: clk: n5x: Fix incorrect EMAC clock source selection

[Chee, Tien Fong]

Hi Lok,


On 7/5/2026 5:02 pm, Chen Huei Lok wrote:
> Fix the incorrect bit masking and bit shift that caused EMAC to always
> get the clock source from emaca_free_clk. The mask must be applied
> before shifting, not after.
>
> Signed-off-by: Chen Huei Lok <chen.huei.lok at altera.com>
> ---
>   drivers/clk/altera/clk-n5x.c | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clk/altera/clk-n5x.c b/drivers/clk/altera/clk-n5x.c
> index 3495283407d..47a51bd5ace 100644
> --- a/drivers/clk/altera/clk-n5x.c
> +++ b/drivers/clk/altera/clk-n5x.c
> @@ -328,14 +328,14 @@ static u32 clk_get_emac_clk_hz(struct socfpga_clk_plat *plat, u32 emac_id)
>   	/* Get EMAC clock source */
>   	ctl = CM_REG_READL(plat, CLKMGR_PERPLL_EMACCTL);
>   	if (emac_id == N5X_EMAC0_CLK)
> -		ctl = (ctl >> CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_OFFSET) &
> -		       CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_MASK;
> +		ctl = (ctl & CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_MASK) >>
> +		       CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_OFFSET;
>   	else if (emac_id == N5X_EMAC1_CLK)
> -		ctl = (ctl >> CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_OFFSET) &
> -		       CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_MASK;
> +		ctl = (ctl & CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_MASK) >>
> +		       CLKMGR_PERPLLGRP_EMACCTL_EMAC1SELB_OFFSET;
>   	else if (emac_id == N5X_EMAC2_CLK)
> -		ctl = (ctl >> CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_OFFSET) &
> -		       CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_MASK;
> +		ctl = (ctl & CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_MASK) >>
> +		       CLKMGR_PERPLLGRP_EMACCTL_EMAC2SELB_OFFSET;
>   	else
>   		return 0;
>   


The fix is correct either way. Agilex uses FIELD_GET(); Agilex5 uses the 
same mask-then-shift this patch applies. FIELD_GET would be a minor 
consistency nit only.

ctl = FIELD_GET(CLKMGR_PERPLLGRP_EMACCTL_EMAC0SELB_MASK, ctl);

Add FIELD_GET in second commit and keep the current as first commit.


Best regards,

Tien Fong