[PATCH 1/2] rockchip: rk3568: make the WDT trigger a first global reset

[Andreas Zdziarstek]

Hi Jonas

Am Di., 23. Juni 2026 um 12:53 Uhr schrieb Jonas Karlman <jonas at kwiboo.se>:
> It should likely be enough to configure this in XPL_BUILD?

Generally yes. I'd like to point out though, that PX30 currently sets
it unconditionally
as well. I thought there may be valid reason to do so in cases where
we don't actually
use the mainline SPL but an rkbin miniloader blob or something. There
was a mention
of that in rockchip.rst.

In that case, moving it into XPL_BUILD might break, depending on
whatever the mini-
loader does.

>
> We should possibly also clear SOC_CON1 to handle reset in similar way as
> TF-A / PSCI reset. RK356x boards use PSCI reset in U-Boot proper
> primarily to work around issues found when working on [1], using first
> global reset seemed to wipe too much information we may want to retain.
>
> [1] https://lore.kernel.org/u-boot/20240202001221.531207-1-jonas@kwiboo.se/

If we want to clear SOC_CON1, we must do it at init as well, as there
is (I think)
no good way to clear it during a WDT reset as it's hardware-autonomous. So this
would make the BOOT_MODE_REG survive every global reset regardless of
cause. Is that the intention?

I could see a wrinkle with a watchdog specifically: What if the cause of the WDT
reboot is related to BOOT_MODE_REG? E.g. we built a U-Boot that somehow
locks up during USB boot, then trips the watchdog. The philosophical question
now: Should the watchdog go back to maskrom again or resume the standard
boot behavior? I guess my expectation would be the latter but not totally sure.

Best,
Andreas