[PATCH v2 4/4] configs: Add defconfig for ipq9650 RDP488

[Casey Connolly]

On 6/10/26 07:36, Badhrinath S wrote:
> Add default configuration for the IPQ9650 RDP488 board with eMMC boot
> support.

Do we need individual defconfigs for every single IPQ board really? One 
or two sure but at this point I think we ought to have a common fragment 
that they include with the base stuff so we can keep things in sync and 
differentiate the platform specific options.

> 
> Signed-off-by: Badhrinath S <badhrinath.s at oss.qualcomm.com>
> ---
> Changes in v2:
> - No changes
> 
>   configs/qcom_ipq9650_mmc_defconfig | 57 ++++++++++++++++++++++++++++++
>   1 file changed, 57 insertions(+)
>   create mode 100644 configs/qcom_ipq9650_mmc_defconfig
> 
> diff --git a/configs/qcom_ipq9650_mmc_defconfig b/configs/qcom_ipq9650_mmc_defconfig
> new file mode 100644
> index 000000000000..ce2488d72eb1
> --- /dev/null
> +++ b/configs/qcom_ipq9650_mmc_defconfig
> @@ -0,0 +1,57 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_POSITION_INDEPENDENT=y
> +CONFIG_SYS_INIT_SP_BSS_OFFSET=0x180000
> +CONFIG_ARCH_SNAPDRAGON=y
> +CONFIG_TEXT_BASE=0x8a280000
> +CONFIG_NR_DRAM_BANKS=24
> +CONFIG_ENV_SIZE=0x40000
> +CONFIG_ENV_OFFSET=0
> +CONFIG_DEFAULT_DEVICE_TREE="qcom/ipq9650-rdp488"
> +CONFIG_SYS_LOAD_ADDR=0x90000000
> +CONFIG_DEBUG_UART_BASE=0x1a98000
> +CONFIG_DEBUG_UART_CLOCK=14745600
> +CONFIG_DEBUG_UART=y
> +CONFIG_REMAKE_ELF=y
> +# CONFIG_EFI_LOADER is not set
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +# CONFIG_BOOTSTD is not set
> +CONFIG_OF_BOARD_SETUP=y
> +CONFIG_USE_PREBOOT=y
> +CONFIG_SYS_PBSIZE=1024
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PART=y
> +CONFIG_OF_LIVE=y
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_CLK=y
> +CONFIG_CLK_QCOM_IPQ9650=y
> +CONFIG_MSM_GPIO=y
> +# CONFIG_I2C is not set
> +# CONFIG_INPUT is not set
> +CONFIG_MISC=y
> +CONFIG_QCOM_GENI=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_ADMA=y
> +CONFIG_MMC_SDHCI_MSM=y
> +CONFIG_MTD=y
> +CONFIG_DM_MDIO=y
> +CONFIG_DM_ETH_PHY=y
> +CONFIG_DWC_ETH_QOS=y
> +CONFIG_DWC_ETH_QOS_QCOM=y
> +CONFIG_RGMII=y
> +CONFIG_PHY=y
> +CONFIG_PHY_QCOM_QMP_UFS=y
> +CONFIG_PHY_QCOM_QUSB2=y
> +CONFIG_PINCTRL=y
> +CONFIG_PINCONF=y
> +CONFIG_PINCTRL_QCOM_IPQ9650=y
> +CONFIG_DEBUG_UART_MSM_GENI=y
> +CONFIG_DEBUG_UART_ANNOUNCE=y
> +CONFIG_MSM_SERIAL=y
> +CONFIG_MSM_GENI_SERIAL=y
> +CONFIG_SOC_QCOM=y
> +CONFIG_SYS_MALLOC_LEN=0xC0000