[PATCH v1 10/10] imx: Remove hardcoded watchdog base address macros
alice.guo at oss.nxp.com
alice.guo at oss.nxp.com
Tue Mar 10 08:53:44 CET 2026
From: Alice Guo <alice.guo at nxp.com>
The watchdog base addresses are now obtained from the devicetree via
the imx_wdog_alias_to_addr() function. Remove the hardcoded macro
definitions as they are no longer needed.
Signed-off-by: Alice Guo <alice.guo at nxp.com>
---
arch/arm/include/asm/arch-imx8ulp/imx-regs.h | 2 --
arch/arm/include/asm/arch-imx9/imx-regs.h | 9 ---------
include/configs/imx8ulp_evk.h | 2 --
include/configs/imx91_evk.h | 2 --
include/configs/imx91_frdm.h | 2 --
include/configs/imx93_evk.h | 3 ---
include/configs/imx93_frdm.h | 3 ---
include/configs/imx93_qsb.h | 2 --
include/configs/imx93_var_som.h | 3 ---
include/configs/imx94_evk.h | 3 ---
include/configs/imx95_evk.h | 2 --
include/configs/kontron-osm-s-mx93.h | 2 --
include/configs/mx7ulp_com.h | 3 ---
include/configs/mx7ulp_evk.h | 3 ---
include/configs/phycore_imx93.h | 3 ---
include/configs/toradex-smarc-imx95.h | 2 --
16 files changed, 46 deletions(-)
diff --git a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h
index a038cc1df33..f9c5e21c14f 100644
--- a/arch/arm/include/asm/arch-imx8ulp/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8ulp/imx-regs.h
@@ -20,8 +20,6 @@
#define SIM1_BASE_ADDR 0x29290000
-#define WDG3_RBASE 0x292a0000UL
-
#define SIM_SEC_BASE_ADDR 0x2802B000
#define CGC1_SOSCDIV_ADDR 0x292C0108
diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h
index 2d084e5227a..fbf2e6a2b01 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -17,15 +17,6 @@
#define ANATOP_BASE_ADDR 0x44480000UL
-#ifdef CONFIG_IMX94
-#define WDG3_BASE_ADDR 0x49220000UL
-#define WDG4_BASE_ADDR 0x49230000UL
-#else
-#define WDG3_BASE_ADDR 0x42490000UL
-#define WDG4_BASE_ADDR 0x424a0000UL
-#endif
-#define WDG5_BASE_ADDR 0x424b0000UL
-
#define GPIO2_BASE_ADDR 0x43810000UL
#define GPIO3_BASE_ADDR 0x43820000UL
#define GPIO4_BASE_ADDR 0x43840000UL
diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h
index edfd6f70815..b4f80fb944b 100644
--- a/include/configs/imx8ulp_evk.h
+++ b/include/configs/imx8ulp_evk.h
@@ -30,6 +30,4 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG3_RBASE
#endif
diff --git a/include/configs/imx91_evk.h b/include/configs/imx91_evk.h
index 9c5014fd0a5..13918e2b873 100644
--- a/include/configs/imx91_evk.h
+++ b/include/configs/imx91_evk.h
@@ -16,6 +16,4 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/imx91_frdm.h b/include/configs/imx91_frdm.h
index 6d051ed88a5..480b3fb477a 100644
--- a/include/configs/imx91_frdm.h
+++ b/include/configs/imx91_frdm.h
@@ -20,6 +20,4 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h
index ffd72a38bcb..67774f54790 100644
--- a/include/configs/imx93_evk.h
+++ b/include/configs/imx93_evk.h
@@ -26,7 +26,4 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/imx93_frdm.h b/include/configs/imx93_frdm.h
index c98c10774cb..bcea360b399 100644
--- a/include/configs/imx93_frdm.h
+++ b/include/configs/imx93_frdm.h
@@ -20,7 +20,4 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/imx93_qsb.h b/include/configs/imx93_qsb.h
index a7b94f7ab57..350f094c2a6 100644
--- a/include/configs/imx93_qsb.h
+++ b/include/configs/imx93_qsb.h
@@ -16,6 +16,4 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/imx93_var_som.h b/include/configs/imx93_var_som.h
index 9dc10aea407..6a425e6d1ea 100644
--- a/include/configs/imx93_var_som.h
+++ b/include/configs/imx93_var_som.h
@@ -38,7 +38,4 @@
#define CFG_SYS_FSL_USDHC_NUM 2
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/imx94_evk.h b/include/configs/imx94_evk.h
index f93c3c4e4a8..2623c13db06 100644
--- a/include/configs/imx94_evk.h
+++ b/include/configs/imx94_evk.h
@@ -18,7 +18,4 @@
#define PHYS_SDRAM_SIZE 0x70000000UL /* 2GB - 256MB DDR */
#define PHYS_SDRAM_2_SIZE 0x180000000 /* 8GB */
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/imx95_evk.h b/include/configs/imx95_evk.h
index 3d22740b3f4..1fdc9ce21ef 100644
--- a/include/configs/imx95_evk.h
+++ b/include/configs/imx95_evk.h
@@ -23,6 +23,4 @@
#define PHYS_SDRAM_2_SIZE 0x380000000 /* 14GB (Totally 16GB) */
#endif
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
diff --git a/include/configs/kontron-osm-s-mx93.h b/include/configs/kontron-osm-s-mx93.h
index ab2b42298c8..fed75e6fa12 100644
--- a/include/configs/kontron-osm-s-mx93.h
+++ b/include/configs/kontron-osm-s-mx93.h
@@ -25,6 +25,4 @@
#define CFG_MXC_USB_FLAGS 0
#endif
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif /* __KONTRON_MX93_CONFIG_H */
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h
index d27e9d2eaa1..501c3059cc3 100644
--- a/include/configs/mx7ulp_com.h
+++ b/include/configs/mx7ulp_com.h
@@ -15,9 +15,6 @@
#include "imx7ulp_spl.h"
#endif
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG1_RBASE
-
#define CFG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */
/* UART */
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index ace1eee70cf..21dbec837f0 100644
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -11,9 +11,6 @@
#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG1_RBASE
-
#define CFG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
/* UART */
diff --git a/include/configs/phycore_imx93.h b/include/configs/phycore_imx93.h
index 07364dff403..a6dd0478585 100644
--- a/include/configs/phycore_imx93.h
+++ b/include/configs/phycore_imx93.h
@@ -22,7 +22,4 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000
-/* Using ULP WDOG for reset */
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif /* __PHYCORE_IMX93_H */
diff --git a/include/configs/toradex-smarc-imx95.h b/include/configs/toradex-smarc-imx95.h
index e1aebd70af2..8a880b96503 100644
--- a/include/configs/toradex-smarc-imx95.h
+++ b/include/configs/toradex-smarc-imx95.h
@@ -19,6 +19,4 @@
#define PHYS_SDRAM_SIZE (SZ_2G - SZ_256M)
#define PHYS_SDRAM_2_SIZE SZ_6G
-#define WDOG_BASE_ADDR WDG3_BASE_ADDR
-
#endif
--
2.43.0
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