[U-Boot] [PATCH v2] nand: Fix cache and memory inconsistent issue

[Stefan Roese]

On Monday 01 December 2008, Scott Wood wrote:
> Please factor this out into arch code, and make it shareable with other
> NAND code (such as nand_boot.c).

Yes, please.

> > +	/*
> > +	 * We need clean dcache and invalidate
> > +	 * to sync between icache and dcache
> > +	 * before jump to RAM. make sure all of
> > +	 * NAND data write to memory.
>
> "Clean d-cache and invalidate i-cache, to make sure that
> no stale data is executed."

And the function name is not perfectly fitting for my taste. Why not extract 2 
functions, flush_dcache_range() and invalidate_icache_range(). This reminds 
me that some architectures/platforms already have those functions defined 
(PPC4xx at least does). But the 2nd parameter is not size but end ("stolen" 
from the Linux kernel). Perhaps it makes sense to use these functions here as 
well.

Best regards,
Stefan

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