[U-Boot] [PATCH v3] nand: Fix cache and memory inconsistent issue

Scott Wood scottwood at freescale.com
Wed Dec 17 23:57:01 CET 2008


On Tue, Dec 02, 2008 at 11:48:51AM +0800, Dave Liu wrote:
> we load the secondary stage u-boot image from NAND to
> system memory by nand_load, but we did not flush d-cache
> to memory, not invalidate i-cache before we jump to RAM.
> when the system is cache enable and the TLB/page attribute
> of system memory is cacheable, it will cause issue.
> 
> - 83xx family is using the d-cache lock, so all of d-cache
>   access is cache-inhibited. so you can't see the issue.
> - 85xx family is using d-cache, i-cache enable, partial
>   cache lock. you will see the issue.
> 
> The patch fix the cache issue.
> 
> Signed-off-by: Dave Liu <daveliu at freescale.com>

Applied to u-boot-nand-flash/next

-Scott


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