[U-Boot] TSEC in loop

[Alemao]

Hi all,

I have a MPC8343 board and Im doing some hardware validation, trying to
use TSEC1 in RGMII 10 Mbps mode.

TSEC1 is connected to a FPGA and while wating for the final logic,
Im testing a logic that puts TSEC1 in loop, RXD0 -> TXD0,
RXD1 -> TXD1, GTX_CLK -> RX_CLK and so on.

The following pins are unconnected in my hardware:

	TSEC1_COL
	TSEC1_CRS
	TSEC1_RX_ER
	TSEC1_TX_ER

My registers configuration:

   	RCWH[TSEC1M] = 00 (RGMII)
	
	MACCFG2[IF]  = 01 (MII)
	
	ECNTRL[RPM]  = 1  (Reduced)

	ECNTRL[R100] = 0  (10 Mbps)

	---------------------------

	MACCFG2 = 0x00007105
	ECNTRL    = 0x00001010


The problem is that when I send a ping, its sends an arp request so I
should receive an arp request cause its in loop, but i got the
follwing error (TSEC1 is called TSEC0 in u-boot):


=> ping 192.168.1.1
Speed: 10, full duplex
Using TSEC0 device
sending ARP for b0100ae3
ARP broadcast 1
Got error 14
ARP broadcast 2
Got error 14
ping failed


Error 14 means:

	- Rx non-octet aligned frame
	- Rx CRC error


And if a change MACCFG2[IF] to 10 (GMII), i got no packets in rx buffer.


Is there any other configuration in u-boot that I have to do?
Is there a problem using a loop in FPGA? Or a real PHY do some more
things to the signal when we put it in loop?


PS: FPGA doesnt reply to any mdio commands, so u-boot thinks its a
generic phy.


Cheers,

--
Alemao