[U-Boot] [PATCH 1/6] AVR32: Make GPIO implmentation cpu dependent
Gunnar Rangoy
gunnar at rangoy.com
Thu Nov 13 16:25:07 CET 2008
There are some differences in the implementation of GPIO in the
at32uc chip compared to the ap700x series.
Signed-off-by: Gunnar Rangoy <gunnar at rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp at gmail.com>
Signed-off-by: Olav Morken <olavmrk at gmail.com>
---
cpu/at32uc/portmux-gpio.c | 30 --------
include/asm-avr32/arch-at32ap700x/gpio-impl.h | 86 +++++++++++++++++++++++
include/asm-avr32/arch-at32uc3a0xxx/gpio-impl.h | 62 ++++++++++++++++
include/asm-avr32/arch-common/portmux-gpio.h | 83 +---------------------
4 files changed, 150 insertions(+), 111 deletions(-)
create mode 100644 include/asm-avr32/arch-at32ap700x/gpio-impl.h
create mode 100644 include/asm-avr32/arch-at32uc3a0xxx/gpio-impl.h
diff --git a/cpu/at32uc/portmux-gpio.c b/cpu/at32uc/portmux-gpio.c
index 8ed5659..0b8bae9 100644
--- a/cpu/at32uc/portmux-gpio.c
+++ b/cpu/at32uc/portmux-gpio.c
@@ -29,26 +29,11 @@
void portmux_select_peripheral(void *port, unsigned long pin_mask,
enum portmux_function func, unsigned long flags)
{
- /* Both pull-up and pull-down set means buskeeper */
- if (flags & PORTMUX_PULL_DOWN)
- gpio_writel(port, PDERS, pin_mask);
- else
- gpio_writel(port, PDERC, pin_mask);
if (flags & PORTMUX_PULL_UP)
gpio_writel(port, PUERS, pin_mask);
else
gpio_writel(port, PUERC, pin_mask);
- /* Select drive strength */
- if (flags & PORTMUX_DRIVE_LOW)
- gpio_writel(port, ODCR0S, pin_mask);
- else
- gpio_writel(port, ODCR0C, pin_mask);
- if (flags & PORTMUX_DRIVE_HIGH)
- gpio_writel(port, ODCR1S, pin_mask);
- else
- gpio_writel(port, ODCR1C, pin_mask);
-
/* Select function */
if (func & PORTMUX_FUNC_B)
gpio_writel(port, PMR0S, pin_mask);
@@ -66,11 +51,6 @@ void portmux_select_peripheral(void *port, unsigned long pin_mask,
void portmux_select_gpio(void *port, unsigned long pin_mask,
unsigned long flags)
{
- /* Both pull-up and pull-down set means buskeeper */
- if (flags & PORTMUX_PULL_DOWN)
- gpio_writel(port, PDERS, pin_mask);
- else
- gpio_writel(port, PDERC, pin_mask);
if (flags & PORTMUX_PULL_UP)
gpio_writel(port, PUERS, pin_mask);
else
@@ -82,16 +62,6 @@ void portmux_select_gpio(void *port, unsigned long pin_mask,
else
gpio_writel(port, ODMERC, pin_mask);
- /* Select drive strength */
- if (flags & PORTMUX_DRIVE_LOW)
- gpio_writel(port, ODCR0S, pin_mask);
- else
- gpio_writel(port, ODCR0C, pin_mask);
- if (flags & PORTMUX_DRIVE_HIGH)
- gpio_writel(port, ODCR1S, pin_mask);
- else
- gpio_writel(port, ODCR1C, pin_mask);
-
/* Select direction and initial pin state */
if (flags & PORTMUX_DIR_OUTPUT) {
if (flags & PORTMUX_INIT_HIGH)
diff --git a/include/asm-avr32/arch-at32ap700x/gpio-impl.h b/include/asm-avr32/arch-at32ap700x/gpio-impl.h
new file mode 100644
index 0000000..8801bd0
--- /dev/null
+++ b/include/asm-avr32/arch-at32ap700x/gpio-impl.h
@@ -0,0 +1,86 @@
+#ifndef __ASM_AVR32_ARCH_GPIO_IMPL_H__
+#define __ASM_AVR32_ARCH_GPIO_IMPL_H__
+
+/* Register offsets */
+struct gpio_regs {
+ u32 GPER;
+ u32 GPERS;
+ u32 GPERC;
+ u32 GPERT;
+ u32 PMR0;
+ u32 PMR0S;
+ u32 PMR0C;
+ u32 PMR0T;
+ u32 PMR1;
+ u32 PMR1S;
+ u32 PMR1C;
+ u32 PMR1T;
+ u32 __reserved0[4];
+ u32 ODER;
+ u32 ODERS;
+ u32 ODERC;
+ u32 ODERT;
+ u32 OVR;
+ u32 OVRS;
+ u32 OVRC;
+ u32 OVRT;
+ u32 PVR;
+ u32 __reserved_PVRS;
+ u32 __reserved_PVRC;
+ u32 __reserved_PVRT;
+ u32 PUER;
+ u32 PUERS;
+ u32 PUERC;
+ u32 PUERT;
+ u32 PDER;
+ u32 PDERS;
+ u32 PDERC;
+ u32 PDERT;
+ u32 IER;
+ u32 IERS;
+ u32 IERC;
+ u32 IERT;
+ u32 IMR0;
+ u32 IMR0S;
+ u32 IMR0C;
+ u32 IMR0T;
+ u32 IMR1;
+ u32 IMR1S;
+ u32 IMR1C;
+ u32 IMR1T;
+ u32 GFER;
+ u32 GFERS;
+ u32 GFERC;
+ u32 GFERT;
+ u32 IFR;
+ u32 __reserved_IFRS;
+ u32 IFRC;
+ u32 __reserved_IFRT;
+ u32 ODMER;
+ u32 ODMERS;
+ u32 ODMERC;
+ u32 ODMERT;
+ u32 __reserved1[4];
+ u32 ODCR0;
+ u32 ODCR0S;
+ u32 ODCR0C;
+ u32 ODCR0T;
+ u32 ODCR1;
+ u32 ODCR1S;
+ u32 ODCR1C;
+ u32 ODCR1T;
+ u32 __reserved2[4];
+ u32 OSRR0;
+ u32 OSRR0S;
+ u32 OSRR0C;
+ u32 OSRR0T;
+ u32 __reserved3[8];
+ u32 STER;
+ u32 STERS;
+ u32 STERC;
+ u32 STERT;
+ u32 __reserved4[35];
+ u32 VERSION;
+};
+
+#endif /* __ASM_AVR32_ARCH_GPIO_IMPL_H__ */
diff --git a/include/asm-avr32/arch-at32uc3a0xxx/gpio-impl.h b/include/asm-avr32/arch-at32uc3a0xxx/gpio-impl.h
new file mode 100644
index 0000000..636bd19
--- /dev/null
+++ b/include/asm-avr32/arch-at32uc3a0xxx/gpio-impl.h
@@ -0,0 +1,62 @@
+#ifndef __ASM_AVR32_ARCH_GPIO_IMPL_H__
+#define __ASM_AVR32_ARCH_GPIO_IMPL_H__
+
+/* Register offsets */
+struct gpio_regs {
+ u32 GPER;
+ u32 GPERS;
+ u32 GPERC;
+ u32 GPERT;
+ u32 PMR0;
+ u32 PMR0S;
+ u32 PMR0C;
+ u32 PMR0T;
+ u32 PMR1;
+ u32 PMR1S;
+ u32 PMR1C;
+ u32 PMR1T;
+ u32 __reserved0[4];
+ u32 ODER;
+ u32 ODERS;
+ u32 ODERC;
+ u32 ODERT;
+ u32 OVR;
+ u32 OVRS;
+ u32 OVRC;
+ u32 OVRT;
+ u32 PVR;
+ u32 __reserved_PVRS;
+ u32 __reserved_PVRC;
+ u32 __reserved_PVRT;
+ u32 PUER;
+ u32 PUERS;
+ u32 PUERC;
+ u32 PUERT;
+ u32 ODMER;
+ u32 ODMERS;
+ u32 ODMERC;
+ u32 ODMERT;
+ u32 IER;
+ u32 IERS;
+ u32 IERC;
+ u32 IERT;
+ u32 IMR0;
+ u32 IMR0S;
+ u32 IMR0C;
+ u32 IMR0T;
+ u32 IMR1;
+ u32 IMR1S;
+ u32 IMR1C;
+ u32 IMR1T;
+ u32 GFER;
+ u32 GFERS;
+ u32 GFERC;
+ u32 GFERT;
+ u32 IFR;
+ u32 __reserved_IFRS;
+ u32 IFRC;
+ u32 __reserved_IFRT;
+ u32 __reserved1[8];
+};
+
+#endif /* __ASM_AVR32_ARCH_GPIO_IMPL_H__ */
diff --git a/include/asm-avr32/arch-common/portmux-gpio.h b/include/asm-avr32/arch-common/portmux-gpio.h
index 24943ec..1306cbe 100644
--- a/include/asm-avr32/arch-common/portmux-gpio.h
+++ b/include/asm-avr32/arch-common/portmux-gpio.h
@@ -24,87 +24,8 @@
#include <asm/io.h>
-/* Register offsets */
-struct gpio_regs {
- u32 GPER;
- u32 GPERS;
- u32 GPERC;
- u32 GPERT;
- u32 PMR0;
- u32 PMR0S;
- u32 PMR0C;
- u32 PMR0T;
- u32 PMR1;
- u32 PMR1S;
- u32 PMR1C;
- u32 PMR1T;
- u32 __reserved0[4];
- u32 ODER;
- u32 ODERS;
- u32 ODERC;
- u32 ODERT;
- u32 OVR;
- u32 OVRS;
- u32 OVRC;
- u32 OVRT;
- u32 PVR;
- u32 __reserved_PVRS;
- u32 __reserved_PVRC;
- u32 __reserved_PVRT;
- u32 PUER;
- u32 PUERS;
- u32 PUERC;
- u32 PUERT;
- u32 PDER;
- u32 PDERS;
- u32 PDERC;
- u32 PDERT;
- u32 IER;
- u32 IERS;
- u32 IERC;
- u32 IERT;
- u32 IMR0;
- u32 IMR0S;
- u32 IMR0C;
- u32 IMR0T;
- u32 IMR1;
- u32 IMR1S;
- u32 IMR1C;
- u32 IMR1T;
- u32 GFER;
- u32 GFERS;
- u32 GFERC;
- u32 GFERT;
- u32 IFR;
- u32 __reserved_IFRS;
- u32 IFRC;
- u32 __reserved_IFRT;
- u32 ODMER;
- u32 ODMERS;
- u32 ODMERC;
- u32 ODMERT;
- u32 __reserved1[4];
- u32 ODCR0;
- u32 ODCR0S;
- u32 ODCR0C;
- u32 ODCR0T;
- u32 ODCR1;
- u32 ODCR1S;
- u32 ODCR1C;
- u32 ODCR1T;
- u32 __reserved2[4];
- u32 OSRR0;
- u32 OSRR0S;
- u32 OSRR0C;
- u32 OSRR0T;
- u32 __reserved3[8];
- u32 STER;
- u32 STERS;
- u32 STERC;
- u32 STERT;
- u32 __reserved4[35];
- u32 VERSION;
-};
+/* Register layout for this specific device */
+#include <asm/arch/gpio-impl.h>
/* Register access macros */
#define gpio_readl(port, reg) \
--
1.5.6.3
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