[U-Boot] [PATCH 2/2] samsung: trats2: add support for new board Trats2
Piotr Wilczek
p.wilczek at samsung.com
Tue Apr 2 10:51:34 CEST 2013
Dear Minkyu Kang,
Thank you for your comments.
Please see my answers below.
> -----Original Message-----
> From: Minkyu Kang [mailto:mk7.kang at samsung.com]
> Sent: Tuesday, April 02, 2013 7:00 AM
> To: Piotr Wilczek
> Cc: u-boot at lists.denx.de; Kyungmin Park; Lukasz Majewski
> Subject: Re: [PATCH 2/2] samsung: trats2: add support for new board
> Trats2
>
> Dear Piotr Wilczek,
>
> On 25/03/13 18:58, Piotr Wilczek wrote:
> > This patch add support for a new Samsung board Trats2.
> >
> > Signed-off-by: Piotr Wilczek <p.wilczek at samsung.com>
> > Signed-off-by: Kyungmin Park <kyungmin.park at samsung.com>
> > CC: Minkyu Kang <mk7.kang at samsung.com>
> >
> > ---
> > board/samsung/trats2/Makefile | 50 +++++
> > board/samsung/trats2/trats2.c | 465
> +++++++++++++++++++++++++++++++++++++++++
> > boards.cfg | 1 +
> > include/configs/trats2.h | 291 ++++++++++++++++++++++++++
> > 4 files changed, 807 insertions(+)
> > create mode 100644 board/samsung/trats2/Makefile create mode 100644
> > board/samsung/trats2/trats2.c create mode 100644
> > include/configs/trats2.h
>
> missing MAINTAINER entry.
I should add this entry.
>
> >
> > diff --git a/board/samsung/trats2/Makefile
> > b/board/samsung/trats2/Makefile new file mode 100644 index
> > 0000000..7f507cc
> > --- /dev/null
> > +++ b/board/samsung/trats2/Makefile
> > @@ -0,0 +1,50 @@
> > +#
> > +# Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. All rights
> reserved.
> > +# Sanghee Kim <sh0130.kim at samsung.com> # # See file CREDITS for list
> > +of people who contributed to this # project.
> > +#
> > +# This program is free software; you can redistribute it and/or #
> > +modify it under the terms of the GNU General Public License as #
> > +published by the Free Software Foundation; either version 2 of # the
> > +License, or (at your option) any later version.
> > +#
> > +# This program is distributed in the hope that it will be useful, #
> > +but WITHOUT ANY WARRANTY; without even the implied warranty of #
> > +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU
> > +General Public License for more details.
> > +#
> > +# You should have received a copy of the GNU General Public License
> #
> > +along with this program; if not, write to the Free Software #
> > +Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-
> 1307
> > +USA #
> > +
> > +include $(TOPDIR)/config.mk
> > +
> > +LIB = $(obj)lib$(BOARD).o
> > +
> > +COBJS-y := trats2.o
> > +
> > +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> > +OBJS := $(addprefix $(obj),$(COBJS-y))
> > +
> > +
> > +$(LIB): $(obj).depend $(OBJS)
> > + $(call cmd_link_o_target, $(OBJS))
> > +
> > +clean:
> > + rm -f $(OBJS)
> > +
> > +distclean: clean
> > + rm -f $(LIB) core *.bak $(obj).depend
> > +
> >
> +#####################################################################
> > +####
> > +
> > +# defines $(obj).depend target
> > +include $(SRCTREE)/rules.mk
> > +
> > +sinclude $(obj).depend
> > +
> >
> +#####################################################################
> > +####
> > diff --git a/board/samsung/trats2/trats2.c
> > b/board/samsung/trats2/trats2.c new file mode 100644 index
> > 0000000..a60fb1a
> > --- /dev/null
> > +++ b/board/samsung/trats2/trats2.c
> > @@ -0,0 +1,465 @@
> > +/*
> > + * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. All
> rights reserved.
>
> 2013 please.
Ok
>
> > + * Sanghee Kim <sh0130.kim at samsung.com>
>
> Is author Sanghee?
It is based on Sanghee Kim work.
>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +
> > +#include <common.h>
> > +#include <i2c.h>
> > +#include <lcd.h>
> > +#include <spi.h>
> > +#include <asm/io.h>
> > +#include <asm/arch/gpio.h>
> > +#include <asm/arch/mmc.h>
> > +#include <asm/arch/power.h>
> > +#include <asm/arch/clk.h>
> > +#include <asm/arch/clock.h>
> > +#include <asm/arch/mipi_dsim.h>
> > +#include <asm/arch/pinmux.h>
> > +#include <mmc.h>
> > +#include <fat.h>
> > +#include <asm/arch/power.h>
> > +#include <power/pmic.h>
> > +#include <power/max77686_pmic.h>
> > +#include <libtizen.h>
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +static struct exynos4x12_gpio_part1 *gpio1; static struct
> > +exynos4x12_gpio_part2 *gpio2;
> > +
> > +static unsigned int board_rev = -1;
> > +
> > +static inline u32 get_model_rev(void);
> > +
> > +static void check_hw_revision(void)
> > +{
> > + int modelrev = 0;
> > + int i;
> > +
> > + /*
> > + * GPM1[1:0]: MODEL_REV[1:0]
> > + * Don't set as pull-none for these N/C pin.
> > + * TRM say that it may cause unexcepted state and leakage
> current.
> > + * and pull-none is only for output function.
> > + */
> > + for (i = 0; i < 2; i++)
> > + s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT);
> > +
> > + /* GPM1[5:2]: HW_REV[3:0] */
> > + for (i = 2; i < 6; i++) {
> > + s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT);
> > + s5p_gpio_set_pull(&gpio2->m1, i, GPIO_PULL_NONE);
> > + }
> > +
> > + udelay(1);
> > +
> > + /* GPM1[1:0]: MODEL_REV[1:0] */
> > + for (i = 0; i < 2; i++)
> > + modelrev |= (s5p_gpio_get_value(&gpio2->m1, i) << i);
> > +
> > + /* board_rev[15:8] = model */
> > + board_rev = modelrev << 8;
> > +}
> > +
> > +#ifdef CONFIG_DISPLAY_BOARDINFO
> > +int checkboard(void)
> > +{
> > + puts("Board:\tTRATS2\n");
> > + return 0;
> > +}
> > +#endif
> > +
> > +static void show_hw_revision(void)
> > +{
> > + printf("HW Revision:\t0x%04x\n", board_rev); }
> > +
> > +u32 get_board_rev(void)
> > +{
> > + return board_rev;
> > +}
> > +
> > +static inline u32 get_model_rev(void) {
> > + return (board_rev >> 8) & 0xff;
> > +}
> > +
> > +static void board_external_gpio_init(void) {
> > + /*
> > + * some pins which in alive block are connected with external
> pull-up
> > + * but it's default setting is pull-down.
> > + * if that pin set as input then that floated
> > + */
> > +
> > + s5p_gpio_set_pull(&gpio2->x0, 2, GPIO_PULL_NONE); /*
> PS_ALS_INT */
> > + s5p_gpio_set_pull(&gpio2->x0, 4, GPIO_PULL_NONE); /* TSP_nINT
> */
> > + s5p_gpio_set_pull(&gpio2->x0, 7, GPIO_PULL_NONE); /*
> AP_PMIC_IRQ*/
> > + s5p_gpio_set_pull(&gpio2->x1, 5, GPIO_PULL_NONE); /*
> IF_PMIC_IRQ*/
> > + s5p_gpio_set_pull(&gpio2->x2, 0, GPIO_PULL_NONE); /* VOL_UP */
> > + s5p_gpio_set_pull(&gpio2->x2, 1, GPIO_PULL_NONE); /* VOL_DOWN
> */
> > + s5p_gpio_set_pull(&gpio2->x2, 3, GPIO_PULL_NONE); /*
> FUEL_ALERT */
> > + s5p_gpio_set_pull(&gpio2->x2, 4, GPIO_PULL_NONE); /* ADC_INT
> */
> > + s5p_gpio_set_pull(&gpio2->x2, 7, GPIO_PULL_NONE); /* nPOWER */
> > + s5p_gpio_set_pull(&gpio2->x3, 0, GPIO_PULL_NONE); /* WPC_INT
> */
> > + s5p_gpio_set_pull(&gpio2->x3, 5, GPIO_PULL_NONE); /* OK_KEY */
> > + s5p_gpio_set_pull(&gpio2->x3, 7, GPIO_PULL_NONE); /* HDMI_HPD
> */
> > +}
> > +
> > +#ifdef CONFIG_SYS_I2C_INIT_BOARD
> > +static void board_init_i2c(void)
> > +{
> > + int err;
> > +
> > + err = exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE);
> > + if (err)
> > + debug("I2C%d not configured\n", I2C_7); } #endif
> > +
> > +int board_early_init_f(void)
> > +{
> > + gpio1 = (struct exynos4x12_gpio_part1 *)EXYNOS4_GPIO_PART1_BASE;
> > + gpio2 = (struct exynos4x12_gpio_part2 *)EXYNOS4_GPIO_PART2_BASE;
> > +
> > + check_hw_revision();
> > + board_external_gpio_init();
> > +
> > + gd->flags |= GD_FLG_DISABLE_CONSOLE;
> > +
> > + return 0;
> > +}
> > +
> > +static int pmic_init_max77686(void);
> > +
> > +int board_init(void)
> > +{
> > + gpio1 = (struct exynos4x12_gpio_part1 *)EXYNOS4_GPIO_PART1_BASE;
> > + gpio2 = (struct exynos4x12_gpio_part2 *)EXYNOS4_GPIO_PART2_BASE;
> > +
> > + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> > + gd->bd->bi_arch_number = CONFIG_MACH_TYPE + 1; /* 3766 */
> > +
> > + /* workaround: clear INFORM4..5 */
> > + writel(0, 0x10020810);
> > + writel(0, 0x10020810 + 4);
> > +
> > + return 0;
> > +}
> > +
> > +int power_init_board(void)
> > +{
> > +#ifdef CONFIG_SYS_I2C_INIT_BOARD
> > + board_init_i2c();
> > +#endif
> > + pmic_init(I2C_7);
> > +
> > + pmic_init_max77686();
> > +
> > + return 0;
> > +}
> > +
> > +int dram_init(void)
> > +{
> > + u32 size_mb;
> > +
> > + size_mb = (get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
> +
> > + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
> > + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
> > + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)) >>
> 20;
> > +
> > + gd->ram_size = size_mb << 20;
> > +
> > + return 0;
> > +}
> > +
> > +void dram_init_banksize(void)
> > +{
> > + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> > + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> > + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> > + gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
> > + gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
> > + gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
> > + gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
> > + gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; }
> > +
> > +int board_mmc_init(bd_t *bis)
> > +{
> > + int err;
> > +
> > + /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
> > + s5p_gpio_direction_output(&gpio2->k0, 2, 1);
> > + s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
> > +
> > + /*
> > + * eMMC GPIO:
> > + * SDR 8-bit at 48MHz at MMC0
> > + * GPK0[0] SD_0_CLK(2)
> > + * GPK0[1] SD_0_CMD(2)
> > + * GPK0[2] SD_0_CDn -> Not used
> > + * GPK0[3:6] SD_0_DATA[0:3](2)
> > + * GPK1[3:6] SD_0_DATA[0:3](3)
> > + *
> > + * DDR 4-bit at 26MHz at MMC4
> > + * GPK0[0] SD_4_CLK(3)
> > + * GPK0[1] SD_4_CMD(3)
> > + * GPK0[2] SD_4_CDn -> Not used
> > + * GPK0[3:6] SD_4_DATA[0:3](3)
> > + * GPK1[3:6] SD_4_DATA[4:7](4)
> > + */
> > +
> > + err = exynos_pinmux_config(PERIPH_ID_SDMMC0,
> PINMUX_FLAG_8BIT_MODE);
> > +
> > + /*
> > + * MMC device init
> > + * mmc0 : eMMC (8-bit buswidth)
> > + * mmc2 : SD card (4-bit buswidth)
> > + */
> > + if (err)
> > + debug("SDMMC0 not configured\n");
> > + else
> > + err = s5p_mmc_init(0, 8);
> > +
> > + /* T-flash detect */
> > + s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
> > + s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
> > +
> > + /*
> > + * Check the T-flash detect pin
> > + * GPX3[3] T-flash detect pin
> > + */
> > + if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
> > + err = exynos_pinmux_config(PERIPH_ID_SDMMC2,
> PINMUX_FLAG_NONE);
> > + if (err)
> > + debug("SDMMC2 not configured\n");
> > + else
> > + err = s5p_mmc_init(2, 4);
> > + }
> > +
> > + return err;
> > +}
> > +
> > +static int pmic_init_max77686(void)
> > +{
> > + struct pmic *p = pmic_get("MAX77686_PMIC");
> > +
> > + if (pmic_probe(p))
> > + return -1;
> > +
> > + /* BUCK/LDO Output Voltage */
> > + max77686_set_ldo_voltage(p, 21, 2800000); /* LDO21 VTF_2.8V
> */
> > + max77686_set_ldo_voltage(p, 23, 3300000); /* LDO23
> TSP_AVDD_3.3V*/
> > + max77686_set_ldo_voltage(p, 24, 1800000); /* LDO24
> TSP_VDD_1.8V */
> > +
> > + /* BUCK/LDO Output Mode */
> > + max77686_set_buck_mode(p, 1, OPMODE_STANDBY); /* BUCK1
> VMIF_1.1V_AP */
> > + max77686_set_buck_mode(p, 2, OPMODE_ON); /* BUCK2
VARM_1.0V_AP */
> > + max77686_set_buck_mode(p, 3, OPMODE_ON); /* BUCK3
VINT_1.0V_AP */
> > + max77686_set_buck_mode(p, 4, OPMODE_ON); /* BUCK4
VG3D_1.0V_AP */
> > + max77686_set_buck_mode(p, 5, OPMODE_ON); /* BUCK5
VMEM_1.2V_AP */
> > + max77686_set_buck_mode(p, 6, OPMODE_ON); /* BUCK6
VCC_SUB_1.35V*/
> > + max77686_set_buck_mode(p, 7, OPMODE_ON); /* BUCK7
VCC_SUB_2.0V */
> > + max77686_set_buck_mode(p, 8, OPMODE_OFF); /* VMEM_VDDF_2.85V
> */
> > + max77686_set_buck_mode(p, 9, OPMODE_OFF); /*
> CAM_ISP_CORE_1.2V*/
> > +
> > + max77686_set_ldo_mode(p, 1, OPMODE_LPM); /* LDO1
VALIVE_1.0V_AP*/
> > + max77686_set_ldo_mode(p, 2, OPMODE_STANDBY); /* LDO2
> VM1M2_1.2V_AP */
> > + max77686_set_ldo_mode(p, 3, OPMODE_LPM); /* LDO3 VCC_1.8V_AP
*/
> > + max77686_set_ldo_mode(p, 4, OPMODE_LPM); /* LDO4 VCC_2.8V_AP
*/
> > + max77686_set_ldo_mode(p, 5, OPMODE_OFF); /* LDO5_VCC_1.8V_IO
*/
> > + max77686_set_ldo_mode(p, 6, OPMODE_STANDBY); /* LDO6
> VMPLL_1.0V_AP */
> > + max77686_set_ldo_mode(p, 7, OPMODE_STANDBY); /* LDO7
> VPLL_1.0V_AP */
> > + max77686_set_ldo_mode(p, 8, OPMODE_LPM); /* LDO8
VMIPI_1.0V_AP */
> > + max77686_set_ldo_mode(p, 9, OPMODE_OFF); /*
CAM_ISP_MIPI_1.2*/
> > + max77686_set_ldo_mode(p, 10, OPMODE_LPM); /* LDO10
> VMIPI_1.8V_AP*/
> > + max77686_set_ldo_mode(p, 11, OPMODE_STANDBY); /* LDO11
> VABB1_1.8V_AP*/
> > + max77686_set_ldo_mode(p, 12, OPMODE_LPM); /* LDO12
> VUOTG_3.0V_AP*/
> > + max77686_set_ldo_mode(p, 13, OPMODE_OFF); /* LDO13
> VC2C_1.8V_AP */
> > + max77686_set_ldo_mode(p, 14, OPMODE_STANDBY); /* VABB02_1.8V_AP
> */
> > + max77686_set_ldo_mode(p, 15, OPMODE_STANDBY); /* LDO15
> VHSIC_1.0V_AP*/
> > + max77686_set_ldo_mode(p, 16, OPMODE_STANDBY); /* LDO16
> VHSIC_1.8V_AP*/
> > + max77686_set_ldo_mode(p, 17, OPMODE_OFF); /*
> CAM_SENSOR_CORE_1.2*/
> > + max77686_set_ldo_mode(p, 18, OPMODE_OFF); /*
> CAM_ISP_SEN_IO_1.8V*/
> > + max77686_set_ldo_mode(p, 19, OPMODE_OFF); /* LDO19
> VT_CAM_1.8V */
> > + max77686_set_ldo_mode(p, 20, OPMODE_ON); /* LDO20
VDDQ_PRE_1.8V*/
> > + max77686_set_ldo_mode(p, 21, OPMODE_OFF); /* LDO21 VTF_2.8V
> */
> > + max77686_set_ldo_mode(p, 22, OPMODE_OFF); /* LDO22
> VMEM_VDD_2.8V*/
> > + max77686_set_ldo_mode(p, 23, OPMODE_OFF); /* LDO23
> TSP_AVDD_3.3V*/
> > + max77686_set_ldo_mode(p, 24, OPMODE_OFF); /* LDO24
> TSP_VDD_1.8V */
> > + max77686_set_ldo_mode(p, 25, OPMODE_OFF); /* LDO25
> VCC_3.3V_LCD */
> > + max77686_set_ldo_mode(p, 26, OPMODE_OFF); /*LDO26
> VCC_3.0V_MOTOR*/
> > +
> > + return 0;
> > +}
> > +
> > +/*
> > + * LCD
> > + */
> > +
> > +#ifdef CONFIG_LCD
> > +static struct mipi_dsim_config dsim_config = {
> > + .e_interface = DSIM_VIDEO,
> > + .e_virtual_ch = DSIM_VIRTUAL_CH_0,
> > + .e_pixel_format = DSIM_24BPP_888,
> > + .e_burst_mode = DSIM_BURST_SYNC_EVENT,
> > + .e_no_data_lane = DSIM_DATA_LANE_4,
> > + .e_byte_clk = DSIM_PLL_OUT_DIV8,
> > + .hfp = 1,
> > +
> > + .p = 3,
> > + .m = 120,
> > + .s = 1,
> > +
> > + /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
> > + .pll_stable_time = 500,
> > +
> > + /* escape clk : 10MHz */
> > + .esc_clk = 20 * 1000000,
> > +
> > + /* stop state holding counter after bta change count 0 ~ 0xfff */
> > + .stop_holding_cnt = 0x7ff,
> > + /* bta timeout 0 ~ 0xff */
> > + .bta_timeout = 0xff,
> > + /* lp rx timeout 0 ~ 0xffff */
> > + .rx_timeout = 0xffff,
> > +};
> > +
> > +static struct exynos_platform_mipi_dsim dsim_platform_data = {
> > + .lcd_panel_info = NULL,
> > + .dsim_config = &dsim_config,
> > +};
> > +
> > +static struct mipi_dsim_lcd_device mipi_lcd_device = {
> > + .name = "s6e8ax0",
> > + .id = -1,
> > + .bus_id = 0,
> > + .platform_data = (void *)&dsim_platform_data,
> > +};
> > +
> > +static int mipi_power(void)
> > +{
> > + struct pmic *p = pmic_get("MAX77686_PMIC");
> > +
> > + /* LDO8 VMIPI_1.0V_AP */
> > + max77686_set_ldo_mode(p, 8, OPMODE_ON);
> > + /* LDO10 VMIPI_1.8V_AP */
> > + max77686_set_ldo_mode(p, 10, OPMODE_ON);
> > +
> > + return 0;
> > +}
> > +
> > +static void lcd_power(void)
> > +{
> > + struct pmic *p = pmic_get("MAX77686_PMIC");
> > +
> > + /* LCD_2.2V_EN: GPC0[1] */
> > + s5p_gpio_set_pull(&gpio1->c0, 1, GPIO_PULL_UP);
> > + s5p_gpio_direction_output(&gpio1->c0, 1, 1);
> > +
> > + /* LDO25 VCC_3.1V_LCD */
> > + pmic_probe(p);
> > + max77686_set_ldo_voltage(p, 25, 3100000);
> > + max77686_set_ldo_mode(p, 25, OPMODE_LPM); }
> > +
> > +static void lcd_reset(void)
> > +{
> > + /* reset lcd */
> > + s5p_gpio_direction_output(&gpio1->f2, 1, 0);
> > + udelay(10);
> > + s5p_gpio_set_value(&gpio1->f2, 1, 1); }
> > +
> > +vidinfo_t panel_info = {
> > + .vl_freq = 60,
> > + .vl_col = 720,
> > + .vl_row = 1280,
> > + .vl_width = 720,
> > + .vl_height = 1280,
> > + .vl_clkp = CONFIG_SYS_HIGH,
> > + .vl_hsp = CONFIG_SYS_LOW,
> > + .vl_vsp = CONFIG_SYS_LOW,
> > + .vl_dp = CONFIG_SYS_LOW,
> > + .vl_bpix = 5, /* Bits per pixel, 2^5 = 32 */
> > +
> > + /* s6e8ax0 Panel infomation */
> > + .vl_hspw = 5,
> > + .vl_hbpd = 10,
> > + .vl_hfpd = 10,
> > +
> > + .vl_vspw = 2,
> > + .vl_vbpd = 1,
> > + .vl_vfpd = 13,
> > + .vl_cmd_allow_len = 0xf,
> > + .mipi_enabled = 1,
> > +
> > + .cfg_gpio = NULL,
> > + .backlight_on = NULL,
> > + .lcd_power_on = lcd_power,
> > + .reset_lcd = lcd_reset,
>
> These callbacks are removed.
>
> commit c18222bee868ae65a878165551d3d407c402f48c
> Author: Ajay Kumar <ajaykumar.rs at samsung.com>
> Date: Thu Feb 21 23:52:58 2013 +0000
>
> video: exynos_dp: Remove callbacks from the driver
>
> Replaced the functionality of callbacks by using a standard set of
> functions.
> Instead of implementing and hooking up a callback, put the same
> code in one of
> the standard set of functions by overriding it.
>
> Please check latest version on u-boot-samsung.
>
Ok, I overlooked that.
> > + .dual_lcd_enabled = 0,
> > +
> > + .init_delay = 0,
> > + .power_on_delay = 25,
> > + .reset_delay = 0,
> > + .interface_mode = FIMD_RGB_INTERFACE, };
> > +
> > +void init_panel_info(vidinfo_t *vid)
> > +{
> > + vid->logo_on = 1;
> > + vid->resolution = HD_RESOLUTION;
> > + vid->rgb_mode = MODE_RGB_P;
> > +
> > + vid->power_on_delay = 30;
> > +
> > + mipi_lcd_device.reverse_panel = 1;
> > +
> > +#ifdef CONFIG_TIZEN
> > + get_tizen_logo_info(vid);
> > +#endif
> > +
> > + strcpy(dsim_platform_data.lcd_panel_name, mipi_lcd_device.name);
> > + dsim_platform_data.mipi_power = mipi_power;
> > + dsim_platform_data.phy_enable = set_mipi_phy_ctrl;
> > + dsim_platform_data.lcd_panel_info = (void *)vid;
> > + exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device);
> > +
> > + s6e8ax0_init();
> > +
> > + exynos_set_dsim_platform_data(&dsim_platform_data);
> > +}
> > +#endif /* LCD */
> > +
> > +#ifdef CONFIG_MISC_INIT_R
> > +int misc_init_r(void)
> > +{
> > + setenv("model", "GT-I8800");
> > + setenv("board", "TRATS2");
> > +
> > + show_hw_revision();
> > +
> > + return 0;
> > +}
> > +#endif
> > +
> > diff --git a/boards.cfg b/boards.cfg
> > index ee68fdd..f685952 100644
> > --- a/boards.cfg
> > +++ b/boards.cfg
> > @@ -300,6 +300,7 @@ s5pc210_universal arm armv7
> universal_c210 samsung
> > smdk5250 arm armv7 smdk5250
> samsung exynos
> > smdkv310 arm armv7 smdkv310
> samsung exynos
> > trats arm armv7 trats
> samsung exynos
> > +trats2 arm armv7 trats2
> samsung exynos
> > harmony arm armv7:arm720t harmony
> nvidia tegra20
> > seaboard arm armv7:arm720t seaboard
> nvidia tegra20
> > ventana arm armv7:arm720t ventana
> nvidia tegra20
> > diff --git a/include/configs/trats2.h b/include/configs/trats2.h new
> > file mode 100644 index 0000000..8b43764
> > --- /dev/null
> > +++ b/include/configs/trats2.h
> > @@ -0,0 +1,291 @@
> > +/*
> > + * Copyright (C) 2011 Samsung Electronics
> > + * Sanghee Kim <sh0130.kim at samsung.com>
> > + *
> > + * Configuation settings for the SAMSUNG EXYNOS4 boards.
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +
> > +#ifndef __CONFIG_H
> > +#define __CONFIG_H
> > +
> > +/*
> > + * High Level Configuration Options
> > + * (easy to change)
> > + */
> > +#define CONFIG_SAMSUNG /* in a SAMSUNG core */
> > +#define CONFIG_S5P /* which is in a S5P Family */
> > +#define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */
> > +#define CONFIG_TIZEN /* TIZEN lib */
> > +
> > +#define PLATFORM_NO_UNALIGNED
> > +
> > +#define CONFIG_SYS_DCACHE_OFF
> > +
> > +#include <asm/arch/cpu.h> /* get chip and board defs */
> > +
> > +#define CONFIG_ARCH_CPU_INIT
> > +#define CONFIG_DISPLAY_CPUINFO
> > +#define CONFIG_DISPLAY_BOARDINFO
> > +
> > +#define CONFIG_SKIP_LOWLEVEL_INIT
> > +
> > +#define CONFIG_SYS_CACHELINE_SIZE 32
> > +
> > +#ifndef CONFIG_SYS_L2CACHE_OFF
> > +#define CONFIG_SYS_L2_PL310
> > +#define CONFIG_SYS_PL310_BASE 0x10502000
> > +#endif
> > +
> > +#define CONFIG_NR_DRAM_BANKS 4
> > +#define PHYS_SDRAM_1 0x40000000 /* LDDDR2 DMC 0 */
> > +#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
> > +#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
> > +#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
> > +#define PHYS_SDRAM_3 0x60000000 /* LPDDR2 DMC 1 */
> > +#define PHYS_SDRAM_3_SIZE (256 << 20) /* 256 MB in CS 0 */
> > +#define PHYS_SDRAM_4 0x70000000 /* LPDDR2 DMC 1 */
> > +#define PHYS_SDRAM_4_SIZE (256 << 20) /* 256 MB in CS 0 */
> > +#define PHYS_SDRAM_END 0x80000000
> > +
> > +#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram
console */
> > +
> > +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
> > +#define CONFIG_SYS_TEXT_BASE 0x43e00000
> > +
> > +#define CONFIG_SYS_CLK_FREQ 24000000
> > +
> > +#define CONFIG_SETUP_MEMORY_TAGS
> > +#define CONFIG_CMDLINE_TAG
> > +#define CONFIG_REVISION_TAG
> > +
> > +/* MACH_TYPE_TRATS2 */
> > +#define MACH_TYPE_TRATS2 3765
> > +#define CONFIG_MACH_TYPE MACH_TYPE_TRATS2
>
> Is it temporary?
>
> > +
> > +#define CONFIG_DISPLAY_CPUINFO
> > +
> > +/*
> > + * Size of malloc() pool
> > + */
> > +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
> > +
> > +/* select serial console configuration */ #define CONFIG_SERIAL2
> > +
> > +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser
> */
> > +#ifdef CONFIG_SYS_HUSH_PARSER
> > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> > +#endif
> > +
> > +#define CONFIG_CMDLINE_EDITING
> > +
> > +#define CONFIG_BAUDRATE 115200
> > +
> > +/* It should define before config_cmd_default.h */ #define
> > +CONFIG_SYS_NO_FLASH
> > +
> > +/***********************************************************
> > + * Command definition
> > + ***********************************************************/
> > +#include <config_cmd_default.h>
> > +
> > +#undef CONFIG_CMD_ECHO
> > +#undef CONFIG_CMD_FPGA
> > +#undef CONFIG_CMD_FLASH
> > +#undef CONFIG_CMD_IMLS
> > +#undef CONFIG_CMD_NAND
> > +#undef CONFIG_CMD_MISC
> > +#undef CONFIG_CMD_NFS
> > +#undef CONFIG_CMD_SOURCE
> > +#undef CONFIG_CMD_XIMG
> > +#define CONFIG_CMD_CACHE
> > +#define CONFIG_CMD_I2C
> > +#define CONFIG_CMD_MMC
> > +#define CONFIG_CMD_GPT
> > +#define CONFIG_CMD_PMIC
> > +
> > +#define CONFIG_BOOTDELAY 3
> > +#define CONFIG_ZERO_BOOTDELAY_CHECK
> > +
> > +#define CONFIG_CMD_FAT
> > +#define CONFIG_FAT_WRITE
> > +
> > +/* EXT4 */
> > +#define CONFIG_CMD_EXT4
> > +#define CONFIG_CMD_EXT4_WRITE
> > +
> > +/* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */
> > +#undef CONFIG_CMD_NET
> > +
> > +/* MMC */
> > +#define CONFIG_GENERIC_MMC
> > +#define CONFIG_MMC
> > +#define CONFIG_S5P_SDHCI
> > +#define CONFIG_SDHCI
> > +#define CONFIG_MMC_SDMA
> > +#define CONFIG_MMC_ASYNC
> > +#define CONFIG_MMC_DEFAULT_DEV 0
> > +
> > +#define FSTYPE_DEFAULT "ext4"
> > +
> > +#define CONFIG_BOOTARGS "Please use defined boot"
> > +#define CONFIG_BOOTCOMMAND "run mmcboot"
> > +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
> > +
> > +#define CONFIG_ENV_OVERWRITE
> > +#define CONFIG_SYS_CONSOLE_INFO_QUIET #define
> > +CONFIG_SYS_CONSOLE_IS_IN_ENV
> > +
> > +/* Tizen - partitions definitions */
> > +#define PARTS_CSA "csa-mmc"
> > +#define PARTS_BOOTLOADER "u-boot"
> > +#define PARTS_BOOT "boot"
> > +#define PARTS_ROOT "platform"
> > +#define PARTS_DATA "data"
> > +#define PARTS_CSC "csc"
> > +#define PARTS_UMS "ums"
> > +
> > +#define PARTS_DEFAULT \
> > + "uuid_disk=${uuid_gpt_disk};" \
> > + "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
> > + "name="PARTS_BOOTLOADER",size=60MiB," \
> > + "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
> > + "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
> > + "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
> > + "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
> > + "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
> > + "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
> > +
> > +#define CONFIG_EXTRA_ENV_SETTINGS \
> > + "bootk=" \
> > + "run loaduimage; bootm 0x40007FC0\0" \
> > + "updatemmc=" \
> > + "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \
> > + "mmc boot 0 1 1 0\0" \
> > + "updatebackup=" \
> > + "mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \
> > + " mmc boot 0 1 1 0\0" \
> > + "updatebootb=" \
> > + "mmc read 0x51000000 0x80 0x200; run updatebackup\0" \
> > + "updateuboot=" \
> > + "mmc write 0x50000000 0x80 0x400\0" \
> > + "updaterestore=" \
> > + "mmc boot 0 1 1 2; mmc read 0x50000000 0 0x800;" \
> > + "mmc boot 0 1 1 0; run updateuboot\0" \
> > + "setupboot=" \
> > + "run updatemmc; run updateuboot; run updatebootb\0" \
> > + "mmcboot=" \
> > + "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} "
> \
> > + "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};
> " \
> > + "run loaduimage; bootm 0x40007FC0\0" \
> > + "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
> > + "boottrace=setenv opts initcall_debug; run bootcmd\0" \
> > + "verify=n\0" \
> > + "rootfstype=ext4\0" \
> > + "console=" CONFIG_DEFAULT_CONSOLE \
> > + "kernelname=uImage\0" \
> > + "loaduimage=" FSTYPE_DEFAULT "load mmc ${mmcdev}:${mmcbootpart} "
> \
> > + "0x40007FC0 ${kernelname}\0" \
> > + "mmcdev=0\0" \
> > + "mmcbootpart=2\0" \
> > + "mmcrootpart=5\0" \
> > + "opts=always_resume=1\0" \
> > + "partitions=" PARTS_DEFAULT \
> > + "uartpath=ap\0" \
> > + "usbpath=ap\0" \
> > + "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
> > + "consoleoff=set console console=ram; save; reset\0" \
> > +
> > +/*
> > + * Miscellaneous configurable options */
> > +#define CONFIG_SYS_LONGHELP /* undef to save
memory
> */
> > +#define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
> > +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size
*/
> > +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
> > +#define CONFIG_SYS_MAXARGS 32 /* max number of command
args
> */
> > +
> > +/* Boot Argument Buffer Size */
> > +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> > +
> > +/* memtest works on */
> > +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
> > +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE +
> 0x5000000)
> > +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE +
> 0x4800000)
> > +
> > +#define CONFIG_SYS_HZ 1000
> > +
> > +/* valid baudrates */
> > +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600,
> 115200 }
> > +
> > +#define CONFIG_SYS_MONITOR_BASE 0x00000000
> > +
> > +/*------------------------------------------------------------------
> -
> > +----
> > + * FLASH and environment organization */
> > +
> > +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors
*/
> > +
> > +#define CONFIG_ENV_IS_IN_MMC
> > +#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
> > +#define CONFIG_ENV_SIZE 4096
> > +#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
> > +#define CONFIG_EFI_PARTITION
> > +#define CONFIG_PARTITION_UUIDS
> > +
> > +#define CONFIG_MISC_INIT_R
> > +#define CONFIG_BOARD_EARLY_INIT_F
> > +
> > +/* I2C */
> > +#include <asm/arch/gpio.h>
> > +
> > +#define CONFIG_SYS_I2C_SPEED 400000 /* 400 Kbps */
> > +#define CONFIG_SYS_I2C_INIT_BOARD
> > +#define CONFIG_I2C_MULTI_BUS
> > +#define CONFIG_MULTI_I2C
> > +#define CONFIG_HARD_I2C
> > +#define CONFIG_DRIVER_S3C24X0_I2C
> > +#define CONFIG_MAX_I2C_NUM 8
> > +#define CONFIG_SYS_MAX_I2C_BUS 11
> > +
> > +/* POWER */
> > +#define CONFIG_POWER
> > +#define CONFIG_POWER_I2C
> > +#define CONFIG_POWER_MAX77686
> > +
> > +/* PWM */
> > +#define CONFIG_PWM
> > +
> > +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
> > + - GENERATED_GBL_DATA_SIZE)
> > +
> > +/* LCD */
> > +#define CONFIG_EXYNOS_FB
> > +#define CONFIG_LCD
> > +#define CONFIG_CMD_BMP
> > +#define CONFIG_BMP_32BPP
> > +#define CONFIG_FB_ADDR 0x52504000
> > +#define CONFIG_S6E8AX0
> > +#define CONFIG_EXYNOS_MIPI_DSIM
> > +#define CONFIG_VIDEO_BMP_GZIP
> > +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12))
> > +
> > +#endif /* __CONFIG_H */
> >
>
> Thanks,
> Minkyu Kang.
Thank you,
Piotr Wilczek
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