[U-Boot] [PATCH v2 6/6] tricorder: enable hw assisted BCH8 in SPL and u-boot

[Andreas Bießmann]

Signed-off-by: Andreas Bießmann <andreas.devel at googlemail.com>
Cc: Tom Rini <trini at ti.com>
Cc: Thomas Weber <weber at corscience.de>
Cc: Ilya Yanok <ilya.yanok at cogentembedded.com>
Cc: Scott Wood <scottwood at freescale.com>
---
since v1:
 * reduce SPL stack size (increase code segment)

 include/configs/tricorder.h |   13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index ebd7a25..4c75cc5 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -125,6 +125,8 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
+#define CONFIG_NAND_OMAP_BCH8
+#define CONFIG_BCH
 
 /* commands to include */
 #include <config_cmd_default.h>
@@ -290,7 +292,7 @@
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 
 #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE		(55 * 1024)	/* 7 KB for stack */
 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
 
 #define CONFIG_SPL_BSS_START_ADDR	0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
@@ -303,11 +305,14 @@
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
-						10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCPOS		{12, 13, 14, 15, 16, 17, 18, 19, 20,\
+			21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
+			34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\
+			47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\
+			60, 61, 62, 63}
 
 #define CONFIG_SYS_NAND_ECCSIZE		512
-#define CONFIG_SYS_NAND_ECCBYTES	3
+#define CONFIG_SYS_NAND_ECCBYTES	13
 
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
 
-- 
1.7.10.4