[U-Boot] [PATCH 0/1] OMAP4/5: I2C: New read/write/probe functions

[Lubomir Popov]

The main feature of this new OMAP4/5 driver is that now i2c_read operates
correctly with chips that have addressable registers wider than 8 bits
(such as TI temperature sensors), or that have multiple non-addressable
registers that have to be retrieved in a bulk transaction (such as TI
clock distributors). The old i2c_read performs separate read transactions
for every byte requested and returns invalid data in these cases (except
possibly the first byte; this invalid data is in fact presented by the
chips, so the driver does not know that it is invalid), or no data at all.

A new, optional i2c_probe function is also available (selected via the
define CONFIG_I2C_PROBE_WRITE) that performs write accesses on the bus
vs read. This allows to identify write-only addresses.

The i2c_write function has been optimized as well.

*** Old driver, running on a TI OMAP4470 Processor Board (750-2173),
    mounted on a custom main board (Benvolio4):

Benvolio4 # i2c probe
Valid chip addresses: 31 48 49 4A 4B 50 6A 6C
Benvolio4 # i2c md 6c 0.0 4
I2C read: I/O error
Error reading the chip.
Benvolio4 # i2c dev 3
Setting bus to 3
Benvolio4 # i2c probe
Valid chip addresses: 48
Benvolio4 # i2c md 48 0.1 2
0000: 22 60    "`
Benvolio4 # i2c md 48 1.1 2
0001: 60 4b    `K
Benvolio4 # i2c md 48 2.1 2
0002: 4b 50    KP
Benvolio4 # 

The chip at address 0x6c above is a TI clock distributor. It does not require
register addressing, and the old driver cannot read from it.

The chip at address 0x48 on I2C4 (i2c dev 3) is a TI temperature sensor. It
has 16 bits (two bytes) of data per addressable register, with the addresses
following normal indexing (0, 1, 2, ...). If we try to read all 16 bits of a
register with the old driver by reading two bytes, we actually get the MS byte
of the indexed register and the MS byte of the next register (because the
driver performs two separate read transactions, incrementing the index).

Note that the old i2c_probe does not detect address 0x30, which is the
write-only configuration register of the dual-port EEPROM.

The new i2c_read performs a standard bulk read transaction (with P-S by
default, or with Sr if configured so by CONFIG_I2C_REPEATED_START) and
works correctly with all types of I2C devices.

*** New driver (on same hardware, with new i2c_probe enabled):

Benvolio4 # i2c probe
Valid chip addresses: 30 31 48 49 4A 4B 50 6A 6C
Benvolio4 # i2c md 6c 0.0 4
0000: 9f f0 09 00    ....
Benvolio4 # i2c dev 3
Setting bus to 3
Benvolio4 # i2c probe
Valid chip addresses: 48
Benvolio4 # i2c md 48 0.1 2
0000: 22 90    ".
Benvolio4 # i2c md 48 1.1 2
0001: 60 a0    `.
Benvolio4 # i2c md 48 2.1 2
0002: 4b 00    K.
Benvolio4 # 

Everything is read correctly and fully matches expected data.

I have tested the driver on OMAP4430, 4460, 4470 and 5430, and found no
issues so far. Nevertheless, folks, any additional testing is strongly
encouraged; the driver should also work on OMAP3 and derivatives, but I
didn't have this opportunity. Therefore this ugly conditional compilation
to build the new functions for OMAP4/5 only exists.

Lubomir