[U-Boot] [PATCH] mx6: fsl_esdhc: Fix waiting for DMA operation completion

[Fabio Estevam]

Hi Eric,

On Wed, Apr 3, 2013 at 8:17 PM, Eric Nelson
<eric.nelson at boundarydevices.com> wrote:

>> Actually, I'm a little confused by PRSSTAT_DLA checking: currently the
>> loop exits
>> when either IRQSTAT_TC occurs _or_ PRSSTAT_DLA flag comes to 0. Is that
>> correct?
>> I'm not quite familiar with using this flag, but should the loop exit when
>> both
>> IRQSTAT_TC occurs _and_ PRSSTAT_DLA flag comes to 0 (i.e. in current code
>> '&&'
>> should be replaced by '||')? And then the modified loop condition (with
>> DMA check)
>> would be
>>
>>     } while (!(irqstat & IRQSTAT_TC) || !(irqstat & IRQSTAT_DINT) ||
>>           (esdhc_read32(&regs->prsstat) & PRSSTAT_DLA));
>>
>> Can you advise anything on using this flag?
>>
>
> That is weird, and suspect. The reference manual indicates that this
> bit (Data line active) will go low when the data lines are done with
> the transaction, but that will happen before the DMA completes, so
> it seems like a bad way to short-circuit the loop.
>
> Fabio, can you comment on this?

I am not very familiar with the mmc driver. Adding Andy in case he has
some insight about it.

>
> The code appears to have been like this since the beginning
> of main-line support for i.MX so there's no history to go on.
>
> The same goes in Freescale's git tree.

Do you mean FSL U-boot or kernel tree? Is it the same with the
mainline kernel driver?

Regards,

Fabio Estevam