[U-Boot] [PATCH v2] Tegra: T30: Beaver board support.

[Tom Warren]

Stephen,


On Mon, Apr 15, 2013 at 11:48 AM, Stephen Warren <swarren at wwwdotorg.org>wrote:

> On 04/12/2013 04:33 PM, Tom Warren wrote:
> > Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu.
> > Add a Beaver build so it can begin to be differentiated, if need be.
>
> > diff --git a/board/nvidia/dts/tegra30-beaver.dts
> b/board/nvidia/dts/tegra30-beaver.dts
>
> > +     memory {
> > +             device_type = "memory";
> > +             reg = <0x80000000 0x80000000>;
>
> That should probably be 0x7ff00000, since the boot ROM(?) prevents use
> of the last 1MiB. This is also a bug in the kernel DT I think.
>

I'll change it. Thanks.


> > +     spi at 7000da00 {
> > +             status = "okay";
> > +             spi-max-frequency = <25000000>;
> > +     };
>
> Shouldn't the SPI flash be listed there too?
>
Yeah, missed that. I'll add it, too.


>
> > diff --git a/include/configs/beaver.h b/include/configs/beaver.h
>
> > +/* Environment in eMMC, at the end of 2nd "boot sector" */
> > +#define CONFIG_ENV_IS_IN_MMC
> > +#define CONFIG_ENV_OFFSET            ((512 * 1024) - CONFIG_ENV_SIZE)
>
> The eMMC boot partitions on Beaver appear to be 1MiB not 512KiB. Hence,
> I think that should be:
>
> #define CONFIG_ENV_OFFSET       ((1024 * 1024) - CONFIG_ENV_SIZE)
>

OK, I'll make that change, too, for V2.


>
> I should really get around to writing a patch to allow negative values
> for the offset, which would be interpreted as relative to the end of the
> partition, to make this automatic. It'd also help e.g. Ventana where
> some boards apparently have different size boot sectors. I'll file
> myself a bug for that.
>
> BTW, did you find out if boards.cfg would allow any of this patch to be
> shared with the existing Cardhu support? Ignoring that, with the above
> issues fixed (assuming the SPI is DT is made to match the kernel), then
> this patch,
>

Haven't looked at modifying boards.cfg yet. I'll take a look before I post
v2.

Thanks.

>
> Reviewed-by: Stephen Warren <swarren at nvidia.com>
>