[U-Boot] [PATCH 01/19] x86: Remove unused bios/pci code

Simon Glass sjg at chromium.org
Thu Apr 18 04:13:30 CEST 2013


Graeme Russ pointed out that this code is no longer used. Remove it.

Signed-off-by: Simon Glass <sjg at chromium.org>
---
 arch/x86/include/asm/pci.h |   4 -
 arch/x86/lib/Makefile      |   1 -
 arch/x86/lib/bios.h        | 170 ----------------------------------------
 arch/x86/lib/pci.c         | 188 ---------------------------------------------
 4 files changed, 363 deletions(-)
 delete mode 100644 arch/x86/lib/bios.h
 delete mode 100644 arch/x86/lib/pci.c

diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 6d68ab6..9cc2034 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -30,8 +30,4 @@
 	const struct pci_device_id _table[]
 
 void pci_setup_type1(struct pci_controller *hose);
-int pci_enable_legacy_video_ports(struct pci_controller* hose);
-int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
-void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
-u32 pci_get_rom_window(struct pci_controller* hose, int size);
 #endif
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index ee89354..9c6b621 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -37,7 +37,6 @@ COBJS-y	+= init_wrappers.o
 COBJS-y	+= interrupts.o
 COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
 COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o
-COBJS-$(CONFIG_PCI) += pci.o
 COBJS-$(CONFIG_PCI) += pci_type1.o
 COBJS-y	+= relocate.o
 COBJS-y += physmem.o
diff --git a/arch/x86/lib/bios.h b/arch/x86/lib/bios.h
deleted file mode 100644
index 96509b0..0000000
--- a/arch/x86/lib/bios.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, <daniel at omicron.se>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _BIOS_H_
-#define _BIOS_H_
-
-#define OFFS_ES		0	/* 16bit */
-#define OFFS_GS		2	/* 16bit */
-#define OFFS_DS		4	/* 16bit */
-#define OFFS_EDI	6	/* 32bit */
-#define OFFS_DI		6	/* low 16 bits of EDI */
-#define OFFS_ESI	10	/* 32bit */
-#define OFFS_SI		10	/* low 16 bits of ESI */
-#define OFFS_EBP	14	/* 32bit */
-#define OFFS_BP		14	/* low 16 bits of EBP */
-#define OFFS_ESP	18	/* 32bit */
-#define OFFS_SP		18	/* low 16 bits of ESP */
-#define OFFS_EBX	22	/* 32bit */
-#define OFFS_BX		22	/* low 16 bits of EBX */
-#define OFFS_BL		22	/* low  8 bits of BX */
-#define OFFS_BH		23	/* high 8 bits of BX */
-#define OFFS_EDX	26	/* 32bit */
-#define OFFS_DX		26	/* low 16 bits of EBX */
-#define OFFS_DL		26	/* low  8 bits of BX */
-#define OFFS_DH		27	/* high 8 bits of BX */
-#define OFFS_ECX	30	/* 32bit */
-#define OFFS_CX		30	/* low 16 bits of EBX */
-#define OFFS_CL		30	/* low  8 bits of BX */
-#define OFFS_CH		31	/* high 8 bits of BX */
-#define OFFS_EAX	34	/* 32bit */
-#define OFFS_AX		34	/* low 16 bits of EBX */
-#define OFFS_AL		34	/* low  8 bits of BX */
-#define OFFS_AH		35	/* high 8 bits of BX */
-#define OFFS_VECTOR	38	/* 16bit */
-#define OFFS_IP		40	/* 16bit */
-#define OFFS_CS		42	/* 16bit */
-#define OFFS_FLAGS	44	/* 16bit */
-
-/* stack at 0x40:0x800 -> 0x800 */
-#define SEGMENT		0x40
-#define STACK		0x800
-
-/*
- * save general registers
- * save some segments
- * save callers stack segment
- * setup BIOS segments
- * setup BIOS stackpointer
- */
-#define MAKE_BIOS_STACK		\
-	pushal;			\
-	pushw	%ds;		\
-	pushw	%gs;		\
-	pushw	%es;		\
-	pushw	%ss;		\
-	popw	%gs;		\
-	movw	$SEGMENT, %ax;	\
-	movw	%ax, %ds;	\
-	movw	%ax, %es;	\
-	movw	%ax, %ss;	\
-	movw	%sp, %bp;	\
-	movw	$STACK, %sp
-
-/*
- * restore callers stack segment
- * restore some segments
- * restore general registers
- */
-#define RESTORE_CALLERS_STACK	\
-	pushw	%gs;		\
-	popw	%ss;		\
-	movw	%bp, %sp;	\
-	popw	%es;		\
-	popw	%gs;		\
-	popw	%ds;		\
-	popal
-
-#ifndef __ASSEMBLY__
-#define BIOS_DATA	((char *)0x400)
-#define BIOS_DATA_SIZE	256
-#define BIOS_BASE	((char *)0xf0000)
-#define BIOS_CS		0xf000
-
-extern ulong __bios_start;
-extern ulong __bios_size;
-
-/* these are defined in a 16bit segment and needs
- * to be accessed with the RELOC_16_xxxx() macros below
- */
-extern u16 ram_in_64kb_chunks;
-extern u16 bios_equipment;
-extern u8  pci_last_bus;
-
-extern void *rm_int00;
-extern void *rm_int01;
-extern void *rm_int02;
-extern void *rm_int03;
-extern void *rm_int04;
-extern void *rm_int05;
-extern void *rm_int06;
-extern void *rm_int07;
-extern void *rm_int08;
-extern void *rm_int09;
-extern void *rm_int0a;
-extern void *rm_int0b;
-extern void *rm_int0c;
-extern void *rm_int0d;
-extern void *rm_int0e;
-extern void *rm_int0f;
-extern void *rm_int10;
-extern void *rm_int11;
-extern void *rm_int12;
-extern void *rm_int13;
-extern void *rm_int14;
-extern void *rm_int15;
-extern void *rm_int16;
-extern void *rm_int17;
-extern void *rm_int18;
-extern void *rm_int19;
-extern void *rm_int1a;
-extern void *rm_int1b;
-extern void *rm_int1c;
-extern void *rm_int1d;
-extern void *rm_int1e;
-extern void *rm_int1f;
-extern void *rm_def_int;
-
-#define RELOC_16_LONG(seg, off) (*(u32 *)(seg << 4 | (u32)&off))
-#define RELOC_16_WORD(seg, off) (*(u16 *)(seg << 4 | (u32)&off))
-#define RELOC_16_BYTE(seg, off) (*(u8 *)(seg << 4 | (u32)&off))
-
-#ifdef PCI_BIOS_DEBUG
-extern u32 num_pci_bios_present;
-extern u32 num_pci_bios_find_device;
-extern u32 num_pci_bios_find_class;
-extern u32 num_pci_bios_generate_special_cycle;
-extern u32 num_pci_bios_read_cfg_byte;
-extern u32 num_pci_bios_read_cfg_word;
-extern u32 num_pci_bios_read_cfg_dword;
-extern u32 num_pci_bios_write_cfg_byte;
-extern u32 num_pci_bios_write_cfg_word;
-extern u32 num_pci_bios_write_cfg_dword;
-extern u32 num_pci_bios_get_irq_routing;
-extern u32 num_pci_bios_set_irq;
-extern u32 num_pci_bios_unknown_function;
-#endif
-
-#endif
-
-#endif
diff --git a/arch/x86/lib/pci.c b/arch/x86/lib/pci.c
deleted file mode 100644
index 71878dd..0000000
--- a/arch/x86/lib/pci.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, <daniel at omicron.se>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-
-#undef PCI_ROM_SCAN_VERBOSE
-
-int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
-{
-	struct pci_controller *hose;
-	int res = -1;
-	int i;
-
-	u32 rom_addr;
-	u32 addr_reg;
-	u32 size;
-
-	u16 vendor;
-	u16 device;
-	u32 class_code;
-
-	u32 pci_data;
-
-	hose = pci_bus_to_hose(PCI_BUS(dev));
-
-	debug("pci_shadow_rom() asked to shadow device %x to %x\n",
-	       dev, (u32)dest);
-
-	pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
-	pci_read_config_word(dev, PCI_DEVICE_ID, &device);
-	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
-
-	class_code &= 0xffffff00;
-	class_code >>= 8;
-
-	debug("PCI Header Vendor %04x device %04x class %06x\n",
-	       vendor, device, class_code);
-
-	/* Enable the rom addess decoder */
-	pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
-	pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
-
-	if (!addr_reg) {
-		/* register unimplemented */
-		printf("pci_chadow_rom: device do not seem to have a rom\n");
-		return -1;
-	}
-
-	size = (~(addr_reg&PCI_ROM_ADDRESS_MASK)) + 1;
-
-	debug("ROM is %d bytes\n", size);
-
-	rom_addr = pci_get_rom_window(hose, size);
-
-	debug("ROM mapped at %x\n", rom_addr);
-
-	pci_write_config_dword(dev, PCI_ROM_ADDRESS,
-			       pci_phys_to_mem(dev, rom_addr)
-			       |PCI_ROM_ADDRESS_ENABLE);
-
-
-	for (i = rom_addr; i < rom_addr + size; i += 512) {
-		if (readw(i) == 0xaa55) {
-#ifdef PCI_ROM_SCAN_VERBOSE
-			printf("ROM signature found\n");
-#endif
-			pci_data = readw(0x18 + i);
-			pci_data += i;
-
-			if (0 == memcmp((void *)pci_data, "PCIR", 4)) {
-#ifdef PCI_ROM_SCAN_VERBOSE
-				printf("Fount PCI rom image at offset %d\n",
-				       i - rom_addr);
-				printf("Vendor %04x device %04x class %06x\n",
-				       readw(pci_data + 4), readw(pci_data + 6),
-				       readl(pci_data + 0x0d) & 0xffffff);
-				printf("%s\n",
-				       (readw(pci_data + 0x15) & 0x80) ?
-				       "Last image" : "More images follow");
-				switch	(readb(pci_data + 0x14)) {
-				case 0:
-					printf("X86 code\n");
-					break;
-				case 1:
-					printf("Openfirmware code\n");
-					break;
-				case 2:
-					printf("PARISC code\n");
-					break;
-				}
-				printf("Image size %d\n",
-				       readw(pci_data + 0x10) * 512);
-#endif
-				/*
-				 * FixMe: I think we should compare the class
-				 * code bytes as well but I have no reference
-				 * on the exact order of these bytes in the PCI
-				 * ROM header
-				 */
-				if (readw(pci_data + 4) == vendor &&
-				    readw(pci_data + 6) == device &&
-				    readb(pci_data + 0x14) == 0) {
-#ifdef PCI_ROM_SCAN_VERBOSE
-					printf("Suitable ROM image found\n");
-#endif
-					memmove(dest, (void *)rom_addr,
-						readw(pci_data + 0x10) * 512);
-					res = 0;
-					break;
-
-				}
-
-				if (readw(pci_data + 0x15) & 0x80)
-					break;
-			}
-		}
-
-	}
-
-#ifdef PCI_ROM_SCAN_VERBOSE
-	if (res)
-		printf("No suitable image found\n");
-#endif
-	/* disable PAR register and PCI device ROM address devocer */
-	pci_remove_rom_window(hose, rom_addr);
-
-	pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
-
-	return res;
-}
-
-#ifdef PCI_BIOS_DEBUG
-
-void print_bios_bios_stat(void)
-{
-	printf("16 bit functions:\n");
-	printf("pci_bios_present:                %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_present));
-	printf("pci_bios_find_device:            %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_find_device));
-	printf("pci_bios_find_class:             %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_find_class));
-	printf("pci_bios_generate_special_cycle: %d\n",
-			RELOC_16_LONG(0xf000,
-				      num_pci_bios_generate_special_cycle));
-	printf("pci_bios_read_cfg_byte:          %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_byte));
-	printf("pci_bios_read_cfg_word:          %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_word));
-	printf("pci_bios_read_cfg_dword:         %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_dword));
-	printf("pci_bios_write_cfg_byte:         %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_byte));
-	printf("pci_bios_write_cfg_word:         %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_word));
-	printf("pci_bios_write_cfg_dword:        %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_dword));
-	printf("pci_bios_get_irq_routing:        %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_get_irq_routing));
-	printf("pci_bios_set_irq:                %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_set_irq));
-	printf("pci_bios_unknown_function:       %d\n",
-			RELOC_16_LONG(0xf000, num_pci_bios_unknown_function));
-}
-#endif
-- 
1.8.2.1



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