[U-Boot] [PATCH 05/15] powerpc/83xx/km: add MV88E6122 switch support for kmvect1

[Kim Phillips]

On Thu, 17 Jan 2013 13:47:51 +0100
Holger Brunck <holger.brunck at keymile.com> wrote:

> +#if defined(CONFIG_KMVECT1)
> +#include <mv88e6352.h>
> +/* Marvell MV88E6122 switch configuration */
> +struct mv88e_sw_reg extsw_conf[] = {
> +	/* port 1, FRONT_MDI, autoneg */
> +	{ PORT(1), PORT_PHY, NO_SPEED_FOR },
> +	{ PORT(1), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
> +	{ PHY(1), PHY_1000_CTRL, NO_ADV },
> +	{ PHY(1), PHY_SPEC_CTRL, AUTO_MDIX_EN },
> +	{ PHY(1), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
> +		FULL_DUPLEX },
> +	/* port 2, unused */
> +	{ PORT(2), PORT_CTRL, PORT_DIS },
> +	{ PHY(2), PHY_CTRL, PHY_PWR_DOWN },
> +	{ PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
> +	/* port 3, BP_MII (CPU), PHY mode, 100BASE */
> +	{ PORT(3), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
> +	/* port 4, ESTAR to slot 11, SerDes, 1000BASE-X */
> +	{ PORT(4), PORT_STATUS, NO_PHY_DETECT },
> +	{ PORT(4), PORT_PHY, SPEED_1000_FOR },
> +	{ PORT(4), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
> +	/* port 5, ESTAR to slot 13, SerDes, 1000BASE-X */
> +	{ PORT(5), PORT_STATUS, NO_PHY_DETECT },
> +	{ PORT(5), PORT_PHY, SPEED_1000_FOR },
> +	{ PORT(5), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
> +	/*
> +	 * Errata Fix: 1.9V Output from Internal 1.8V Regulator,
> +	 * acc . MV-S300889-00D.pdf , clause 4.5
> +	 */
> +	{ PORT(5), 0x1A, 0xADB1 },
> +	/* port 6, unused, this port has no phy */
> +	{ PORT(6), PORT_CTRL, PORT_DIS },
> +};
> +#endif

this chunk introduces a new sparse warning:

km83xx.c:217:21: warning: symbol 'extsw_conf' was not declared. Should it be static?

>  int last_stage_init(void)
>  {
> +#if defined(CONFIG_KMVECT1)
> +	struct km_bec_fpga *base =
> +		(struct km_bec_fpga *)CONFIG_SYS_KMBEC_FPGA_BASE;
> +	u8 tmp_reg;
> +
> +	/* Release mv88e6122 from reset */
> +	tmp_reg = in_8(&base->res1[0]) | 0x10; /* DIRECT3 register */
> +	out_8(&base->res1[0], tmp_reg);	       /* GP28 as output */
> +	tmp_reg = in_8(&base->gprt3) | 0x10;   /* GP28 to high */
> +	out_8(&base->gprt3, tmp_reg);
> +
> +	/* configure MV88E6122 switch */
> +	char *name = "UEC2";
> +
> +	if (miiphy_set_current_dev(name))
> +		return 0;
> +
> +	mv88e_sw_program(name, CONFIG_KM_MVEXTSW_ADDR, extsw_conf,
> +		ARRAY_SIZE(extsw_conf));
> +
> +	mv88e_sw_reset(name, CONFIG_KM_MVEXTSW_ADDR);
> +
> +	if (piggy_present()) {
> +		uchar enetaddr[6];
> +		if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
> +			/* increment last 3 bytes */
> +			u32 val = (enetaddr[3] << 16) + (enetaddr[4] << 8)
> +				+ enetaddr[5];
> +			val++;
> +			enetaddr[3] = (val >> 16) & 0xFF;
> +			enetaddr[4] = (val >>  8) & 0xFF;
> +			enetaddr[5] = (val >>  0) & 0xFF;
> +			if (!eth_setenv_enetaddr("eth1addr", enetaddr)) {
> +				setenv("ethact", "UEC2");
> +				setenv("netdev", "eth1");
> +				puts("using PIGGY for network boot\n");
> +			} else
> +				puts("using frontport for network boot\n");
> +		}
> +	} else
> +		puts("using frontport for network boot\n");
> +#endif
> +

AFAIK, assigning the switch MAC address to the front port's MAC
address plus one isn't acceptable practice for u-boot board code.
Get eth1addr in the same manner ethaddr is obtained/assigned.

> +#if !defined(CONFIG_MPC8309)
>  #define CONFIG_UEC_ETH1		/* GETH1 */
>  #define UEC_VERBOSE_DEBUG	1
> +#endif
>  
>  #ifdef CONFIG_UEC_ETH1
> -#if defined(CONFIG_MPC8309)
> -#define CONFIG_SYS_UEC1_UCC_NUM	2	/* UCC3 */
> -#define CONFIG_SYS_UEC1_RX_CLK		QE_CLK_NONE /* not used in RMII Mode */
> -#define CONFIG_SYS_UEC1_TX_CLK		QE_CLK12
> -#else
>  #define CONFIG_SYS_UEC1_UCC_NUM	3	/* UCC4 */
>  #define CONFIG_SYS_UEC1_RX_CLK		QE_CLK_NONE /* not used in RMII Mode */
>  #define CONFIG_SYS_UEC1_TX_CLK		QE_CLK17
> -#endif
>  #define CONFIG_SYS_UEC1_ETH_TYPE	FAST_ETH
>  #define CONFIG_SYS_UEC1_PHY_ADDR	0
>  #define CONFIG_SYS_UEC1_INTERFACE_TYPE	PHY_INTERFACE_MODE_RMII

how are these changes related?

Kim