[U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done
Xie Shaohui-B21989
B21989 at freescale.com
Wed Jan 23 11:17:44 CET 2013
Hello, Anatolij Gustschin,
Could you please post the " bank 3 reset wait timeout" dumped by U-boot, I don't see this, and also the RCW dump?
Best Regards,
Shaohui Xie
> -----Original Message-----
> From: Anatolij Gustschin [mailto:agust at denx.de]
> Sent: Wednesday, January 23, 2013 4:49 PM
> To: u-boot at lists.denx.de
> Cc: Xie Shaohui-B21989; Fleming Andy-AFLEMING
> Subject: [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done
>
> Bank 3 is not present on P2041, do not try to wait for RSTDONE for this
> bank. This fixes the bank 3 reset wait timeout and thus speeds up booting
> on P2041RDB.
>
> Signed-off-by: Anatolij Gustschin <agust at denx.de>
> Cc: Shaohui Xie <Shaohui.Xie at freescale.com>
> Cc: Andy Fleming <afleming at freescale.com>
> ---
> arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> index 5495dc5..2cea1dc 100644
> --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
> @@ -579,6 +579,10 @@ void fsl_serdes_init(void)
> for (lane = 0; lane < SRDS_MAX_LANES; lane++) {
> enum srds_prtcl lane_prtcl = serdes_get_prtcl(cfg, lane);
> if (serdes_lane_enabled(lane)) {
> +#if defined(CONFIG_PPC_P2041)
> + if (!is_serdes_prtcl_valid(lane_prtcl))
> + continue;
> +#endif
> have_bank[serdes_get_bank_by_lane(lane)] = 1;
> serdes_prtcl_map |= (1 << lane_prtcl);
> }
> --
> 1.7.11.7
>
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