[U-Boot] [PATCH 2/3 V2] EXYNOS5: Add gpio pin numbering feature

[Simon Glass]

Hi,

On Wed, Jan 23, 2013 at 2:48 AM, Rajeshwari Shinde
<rajeshwari.s at samsung.com> wrote:
> This patch adds support for gpio pin numbering support on EXYNOS5
> pinmux.
>
> Signed-off-by: Leela Krishna Amudala <l.krishna at samsung.com>
> Signed-off-by: Rajeshwari Shinde <rajeshwari.s at samsung.com>
> ---
> Changes in V2:
>         - none.
>  arch/arm/cpu/armv7/exynos/pinmux.c      |  148 +++++--------
>  arch/arm/include/asm/arch-exynos/gpio.h |  360 ++++++++++++++++++++++++++++++-
>  2 files changed, 413 insertions(+), 95 deletions(-)
>

> diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h
> index cfe1024..af882dd 100644
> --- a/arch/arm/include/asm/arch-exynos/gpio.h
> +++ b/arch/arm/include/asm/arch-exynos/gpio.h
> @@ -272,15 +272,355 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
>             - EXYNOS5_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \
>           * GPIO_PER_BANK) + pin) + EXYNOS5_GPIO_PART2_MAX)
>
> +/* A list of valid GPIO numbers for the asm-generic/gpio.h interface */
> +enum exynos5_gpio_pin {
> +       /* GPIO_PART1_STARTS */
> +       GPIO_A00,
> +       GPIO_A01,
> +       GPIO_A02,
> +       GPIO_A03,
[snip]

> +       GPIO_V44,
> +       GPIO_V45,
> +       GPIO_V46,
> +       GPIO_V47,
> +
> +       /* GPIO_PART4_STARTS */
> +       GPIO_PART3_MAX,
> +       GPIO_Z0 = GPIO_PART3_MAX,
> +       GPIO_Z1,
> +       GPIO_Z2,
> +       GPIO_Z3,
> +       GPIO_Z4,
> +       GPIO_Z5,
> +       GPIO_Z6,
> +       GPIO_MAX_PORT
> +};
> +
>  static inline unsigned int s5p_gpio_base(int nr)
>  {
>         if (cpu_is_exynos5()) {
> -               if (nr < EXYNOS5_GPIO_PART1_MAX)
> +               if (nr < GPIO_PART1_MAX)
>                         return EXYNOS5_GPIO_PART1_BASE;
> -               else if (nr < EXYNOS5_GPIO_PART2_MAX)
> +               else if (nr < GPIO_PART2_MAX)
>                         return EXYNOS5_GPIO_PART2_BASE;
> -               else
> +               else if (nr < GPIO_PART3_MAX)
>                         return EXYNOS5_GPIO_PART3_BASE;
> +               else
> +                       return EXYNOS5_GPIO_PART4_BASE;
>
>         } else if (cpu_is_exynos4()) {
>                 if (nr < EXYNOS4_GPIO_PART1_MAX)
> @@ -295,12 +635,14 @@ static inline unsigned int s5p_gpio_base(int nr)
>  static inline unsigned int s5p_gpio_part_max(int nr)
>  {
>         if (cpu_is_exynos5()) {
> -               if (nr < EXYNOS5_GPIO_PART1_MAX)
> +               if (nr < GPIO_PART1_MAX)
>                         return 0;
> -               else if (nr < EXYNOS5_GPIO_PART2_MAX)
> -                       return EXYNOS5_GPIO_PART1_MAX;
> +               else if (nr < GPIO_PART2_MAX)
> +                       return GPIO_PART1_MAX;
> +               else if (nr < GPIO_PART3_MAX)
> +                       return GPIO_PART2_MAX;
>                 else
> -                       return EXYNOS5_GPIO_PART2_MAX;
> +                       return GPIO_PART3_MAX;
>
>         } else if (cpu_is_exynos4()) {
>                 if (nr < EXYNOS4_GPIO_PART1_MAX)
> @@ -311,6 +653,10 @@ static inline unsigned int s5p_gpio_part_max(int nr)
>
>         return 0;
>  }

Do these functions need to be inline in the header file, or could they
move to the GPIO driver?

> +
> +void gpio_cfg_pin(int gpio, int cfg);
> +void gpio_set_pull(int gpio, int mode);
> +void gpio_set_drv(int gpio, int mode);
>  #endif
>
>  /* Pin configurations */
> --
> 1.7.4.4
>