[U-Boot] [RFC PATCH] mpc85xx: move generic corenet to cpu/mpc85xxx

[Valentin Longchamp]

Hi Andy,

On 05/04/2013 12:55 AM, Andy Fleming wrote:
> On Fri, May 3, 2013 at 9:02 AM, Valentin Longchamp
> <valentin.longchamp at keymile.com <mailto:valentin.longchamp at keymile.com>> wrote:
> 
>     This allows to use this code on non Freescale QorIQ boards. If I am
>     right, there are currently only Freescale boards with a QorIQ Soc that
>     is supported by u-boot, that's why this code was located there.
> 
> 
> Well, the problem is that it is not necessarily the case that a non-Freescale
> QorIQ board will want the same LAW, TLB, and pci setup as the Freescale boards.
> This code is shared on our boards because our boards share a common
> infrastructure. We use the same FPGA for board management across these boards,
> and the SoC architectures are similar enough that this code can be shared. It is
> unlikely that non-Freescale boards need:
> 
> #ifdef PIXIS_BASE
>         SET_TLB_ENTRY(0, PIXIS_BASE, PIXIS_BASE_PHYS,
>                       MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
>                       0, 0, BOOKE_PAGESZ_4K, 0),
> #endif 

My main intention with this patch was to avoid as much as possible code
duplication. This is our first QorIQ board and we are quite conservative with
many things, that's why mcuh of the initialization would still be valid for us.

You are right about the management FPGA, we have our own. My idea was simply to
not #define PIXIS_BASE in our config file.

> 
> There are many decisions that need to be made when making a board port regarding
> the allocation of LAWs and TLBs, and those decisions are highly influenced by
> the design of the board. This is an odd case where, even if your board is nearly
> identical to ours, it would be better to copy the code. We may, at some point
> release another board which is close enough that we can share the code, at which
> point we would (carefully) modify these files to accommodate the new board. If
> there are unknown other boards consuming these settings, it's far more
> complicated for both parties.

Ok thank you for the precision. As I said, since our current design is nearly
identical to the Freescale dev boards, I wanted to avoid copying the code. Since
your recommendation is actually to copy it I will do this.

> 
> TLB and LAW settings are highly specific to the board. While some of the
> information is similar across boards, most of the information in those files is
> how to lay out a memory map for the devices on the chip and the board. You don't
> want to blindly copy ours -- you want to tailor yours to the board you have.
> This is an odd case where, even if you *did* want to copy ours, you should
> actually make a separate copy. We made this a shared file because the QorIQ
> boards share a similar architecture. If you look through board/freescale/ for
> tlb.c, you'll see that every other board in there has its own, despite the fact
> that many of the SoCs are quite similar.

OK. Since a big part of the layout is related to devices on the chip and not on
the board, that's why I thought it made sense to share this code. It will maybe
come at a later point.

Valentin