[U-Boot] ARM v7: Flush icache when executing a program with go

[Henrik Nordström]

ons 2013-05-15 klockan 19:39 +0200 skrev Albert ARIBAUD:



> I understand all this, but what I am interested in is the root issue.
> 
> IIUC, the problem is that some code is loaded in DDR, and the CPU is
> about to jump to it, but its instruction cache is enabled so maybe some
> instructions after 'go' will be (wrongly) fetched from I-cache instead
> of being read from DDR (and fed into I-cache).

Yes.

> Nothing in this is ARMv7 specific; it could happen in an arm926ejs just
> as well. It could happen on any CPU with distinct, non-consistent I-
> and D- caches an enabled I-cache.

Correct on all accounts.

> So my suggestion is to implement the icache_flush in common/bmmt_cmd.c
> as follows:
> 
> ...
> /* just about to 'go' */
> #if CONFIG_ARM
> #if CONFIG_ICACHE
> if (icache_status())
> 	invalidate_icache_all();
> #endif /* CONFIG_ICACHE */
> #endif /* CONFIG_ARM */
> /* now go */

This style is a nightmare for adding more arches needing this, but
solves the problem today.

But there is no CONFIG_ICACHE. In ARM there is CONFIG_SYS_ICACHE_OFF but
it's not quite the same.