[U-Boot] [PATCH v3 2/3] board: freescale: ls1012a: LS1012A-2G5RDB board support

York Sun york.sun at nxp.com
Mon Jan 8 19:39:45 UTC 2018


On 11/29/2017 09:13 PM, Bhaskar Upadhaya wrote:
> LS1012A-2G5RDB belongs to LS1012A family with features
> 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi
> DDR, eMMC, QuadSPI, UART
> 
> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya at nxp.com>
> ---
> changes for v3:
>  1. remove pfe driver changes from this patch
>  2. remove PCIe, DSPI from ls1012a2g5rdb_qspi_defconfig
> 

<snip>

> diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
> index 41283db..9675335 100644
> --- a/board/freescale/ls1012ardb/ls1012ardb.c
> +++ b/board/freescale/ls1012ardb/ls1012ardb.c
> @@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
>  
>  int checkboard(void)
>  {
> +#ifdef CONFIG_TARGET_LS1012ARDB
>  	u8 in1;
>  
>  	puts("Board: LS1012ARDB ");
> @@ -57,6 +58,9 @@ int checkboard(void)
>  		puts(": bank2\n");
>  	else
>  		puts("unknown\n");
> +#else
> +	puts("Board: LS1012A2G5RDB ");
> +#endif
>  
>  	return 0;
>  }
> @@ -148,10 +152,12 @@ int esdhc_status_fixup(void *blob, const char *compat)
>  	 *	10 - eMMC Memory
>  	 *	11 - SPI
>  	 */
> +#ifdef CONFIG_TARGET_LS1012ARDB
>  	if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) {
>  		printf("Error reading i2c boot information!\n");
>  		return 0; /* Don't want to hang() on this error */
>  	}
> +#endif
>  
>  	mux_sdhc2 = (io & 0x0c) >> 2;
>  	/* Enable SDHC2 only when use SDIO wifi and eMMC */

Bhaskar,

Please double check changes to this file. I am seeing compiling errors
related to I2C_MUX_IO_ADDR, I2C_MUX_IO_1, SW_REV_MASK, SW_REV_D for
ls1012a2g5rdb_qspi on top of master branch.

York


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