[U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses

[Marek Vasut]

On 01/10/2018 04:33 PM, Goldschmidt Simon wrote:
> On Tue 09/01/18 14:19, Vignesh R wrote:
>> This series reverts use of bounce_buf.c for non-DMA related alignment restriction
>> and replaces it with local bounce buffer to handle problems with non 32 bit aligned
>> writes on TI platforms.
>> Based on top of Jason's series:
>> https://patchwork.ozlabs.org/cover/856431/
>>
>> Tested on K2G EVM.
> 
> For this whole series:
> Tested on a socfpga-cyclonev board (with a Micron N25QL256A):
> Tested-by: Simon Goldschmidt <sgoldschmidt at de.pepperl-fuchs.com>
> 
> After applying this series on top of Jason's v5, qspi on the socfpga is finally
> working without local fixes!

Super, thanks for testing.

Also, please fix your mailer so it doesn't break threading.

> Regards,
> Simon
> 


-- 
Best regards,
Marek Vasut