[U-Boot] [PATCH v2 2/8] arm: socfpga: gen5: add reset & sdr node to SPL devicetrees

[Marek Vasut]

On 2/21/19 10:43 PM, Simon Goldschmidt wrote:
> The SPL for socfpga gen5 currently takes all peripherals out of reset
> unconditionally. To implement proper reset handling for peripherals,
> the reset node has to be provided with the SPL dts.
> 
> In preparation to move the DDR driver to DM, the sdr node is required
> in SPL, too.
> 
> This patch adds "u-boot,dm-pre-reloc" to U-Boot specific dtsi addon
> files so that the reset manager and SDR driver correctly probe in SPL.
> 
> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> ---
> 
> Changes in v2: None
> 
>  arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi          | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts             | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_de10_nano.dts            | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_de1_soc.dts              | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_is1.dts                  | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi        | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi       | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi     | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_sr1500.dts               | 8 ++++++++
>  arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi  | 8 ++++++++
>  11 files changed, 88 insertions(+)
> 
> diff --git a/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi
> index c44d1ee2fa..8aaec56285 100644
> --- a/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi
> +++ b/arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi
> @@ -17,6 +17,14 @@
>  	};
>  };
>  
> +&rst {
> +	u-boot,dm-pre-reloc;
> +};
> +
> +&sdr {
> +	u-boot,dm-pre-reloc;
> +};

What about some socfpga-common-u-boot.dtsi to avoid duplication ?

-- 
Best regards,
Marek Vasut