[U-Boot] [PATCH v9 0/7] Add support for loading FPGA bitstream
Chee, Tien Fong
tien.fong.chee at intel.com
Tue Feb 26 12:34:22 UTC 2019
On Tue, 2019-02-19 at 11:47 +0800, tien.fong.chee at intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee at intel.com>
>
> This version mainly resolved comments from Marek in [v8].
>
> This series is working on top of u-boot.git - http://git.denx.de/u-b
> oot.git .
>
> These patches are required before applying this series of patches
> 1. [U-Boot,v4] misc: fs_loader: Add support for initializing block
> device
> https://patchwork.ozlabs.org/project/uboot/list/?series=89282 (done
> review)
>
> 2 a. [U-Boot,v3,1/2] fs: fat: dynamically allocate memory for
> temporary buffer
> b. [U-Boot,v3,2/2] fs: fat: Reduce default max clustersize 64KiB
> from malloc
> pool
> https://patchwork.ozlabs.org/project/uboot/list/?series=91135 (under
> review)
>
> 3. [U-Boot] misc: fs_loader: Replace label with DT phandle
> https://patchwork.ozlabs.org/project/uboot/list/?series=92167 (under
> review)
>
> [v8]: https://www.mail-archive.com/u-boot@lists.denx.de/msg316086.htm
> l
> [v7]: https://www.mail-archive.com/u-boot@lists.denx.de/msg314511.htm
> l
>
>
> Tien Fong Chee (7):
> ARM: socfpga: Description on FPGA bitstream type and file name for
> Arria 10
> ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK
> ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
> ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
> spl : socfpga: Implement fpga bitstream loading with socfpga loadfs
> ARM: socfpga: Synchronize the configuration for A10 SoCDK
> ARM: socfpga: Increase Malloc pool size to support FAT filesystem
> in
> SPL
>
> arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 17 +
> .../include/mach/fpga_manager_arria10.h | 40 +-
> arch/arm/mach-socfpga/spl_a10.c | 31 +-
> board/altera/arria10-socdk/fit_spl_fpga.its | 38 ++
> configs/socfpga_arria10_defconfig | 21 +-
> .../fpga/altera-socfpga-a10-fpga-mgr.txt | 26 +-
> drivers/fpga/socfpga_arria10.c | 533
> ++++++++++++++++++++-
> include/configs/socfpga_common.h | 4 +-
> include/image.h | 4 +
> 9 files changed, 682 insertions(+), 32 deletions(-)
> create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its
>
Any comment?
Thanks,
TF
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