[PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images

[Marek Vasut]

On 8/5/20 10:15 AM, Chee Hong Ang wrote:
> Generate spl/u-boot-splx4.sfp which consist of 4 SPL images required
> for booting up Cyclone5/Arria10.
> 
> Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
> ---
>  Makefile | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/Makefile b/Makefile
> index 2629a74..13429a0 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
>  ifneq ($(CONFIG_ARCH_SOCFPGA),)
>  quiet_cmd_socboot = SOCBOOT $@
>  cmd_socboot = cat	spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
> -			spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
> -			u-boot.img > $@ || rm -f $@
> +			spl/u-boot-spl.sfp \
> +			spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \
> +	      cat	spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@

Isn't that what the existing code does already ?

Also, this will I think fail on 128k erase block size NAND due to
missing padding.